Senior Project Manager, Semiconductor Solutions

TSMC; San Jose (CA); On-site; USD 130,000 - 210,000; Full time

Job summary

TSMC North America seeks an experienced Project/Program Manager to support the Field Technical Solutions team in San Jose, CA. You will engage strategic customers, drive cross-functional programs, and enable silicon success with TSMC’s technologies and methodologies.

You will lead technical problem-solving across PMIC, AMS, and advanced nodes, coordinating with RD, Design Enablement, and EDA teams to ensure on-time tape-outs and robust design flows.

Qualifications

• Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field.
• 12+ years in semiconductor tech development, IC design, or field engineering.
• Experience in customer-facing FAE/FTS roles with program management skills.
• Knowledge of PMIC, power delivery, and AMS design flows.
• Familiarity with AI/Robotics hardware, high-speed comms, or processors.

Responsibilities

• Build and nurture relationships with key customers and understand product roadmaps.
• Lead investigation and resolution of complex technical issues across PMIC/AMS domains.
• Advise on design methodologies, EDA flows, IP, spice models, and PDKs.
• Collaborate with North America and Taiwan teams to deliver solutions.
• Deliver training, presentations, and clear technical communications.

Skills

Customer engagement

Cross-functional leadership

Program management

PMIC knowledge

AMS/Analog design

Nanosheet/FinFET

EDA flows

PDK understanding

CMOS process knowledge

Communication skills

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Cadence

Siemens

Synopsys

Job description

TSMC North America seeks an experienced Project/Program Manager to support the Field Technical Solutions team in San Jose, CA. You will engage strategic customers, drive cross-functional programs, and enable silicon success with TSMC’s technologies and methodologies.

You will lead technical problem-solving across PMIC, AMS, and advanced nodes, coordinating with RD, Design Enablement, and EDA teams to ensure on-time tape-outs and robust design flows.