Senior Process Engineer, RIE Front End — Onsite VT

GlobalFoundries; United States; On-site; USD 69,000 - 120,000; Full time

Job summary

GlobalFoundries' Essex Junction, VT site is seeking a Sr Process Engineer to own, sustain, and improve Front End of Line Reactive Ion Etch (RIE) processes on the RIE module. This fully onsite role runs Monday–Friday daytime.

You will collaborate with maintenance, process technicians, and equipment engineers to meet production demands and drive continuous improvement. The role requires a BS in a relevant engineering discipline, 2–3 years semiconductor experience, and strong English communication.

Qualifications

• BS degree in Chemical Engineering or related engineering physical science discipline.
• 2–3 years of semiconductor experience or relevant manufacturing experience.
• Fluency in English (written & spoken).

Responsibilities

• Collaborate daily with maintenance technicians, process technicians, and equipment engineers to meet production demands.
• Design and execute experiments to perform root cause understanding.
• Drive continuous improvement efforts to improve throughput, reduce costs, and increase yield learning.
• Lead process qualifications for new tools and processes; implement process control plans.
• Support cross-functional problem solving with facilities, maintenance and equipment engineering.
• Create, execute and improve standard work.
• Partner with integration, equipment, and quality teams to support development of new technologies.

Skills

Semiconductor experience

English fluency

Education

BS in Chemical Engineering

Tools

DOE

SPC

Job description

GlobalFoundries' Essex Junction, VT site is seeking a Sr Process Engineer to own, sustain, and improve Front End of Line Reactive Ion Etch (RIE) processes on the RIE module. This fully onsite role runs Monday–Friday daytime.

You will collaborate with maintenance, process technicians, and equipment engineers to meet production demands and drive continuous improvement. The role requires a BS in a relevant engineering discipline, 2–3 years semiconductor experience, and strong English communication.