Senior Principal RF Design Architect

Qorvo Power; Chandler (AZ); On-site; USD 168,000 - 218,000; Full time

Job summary

Qorvo Power in Chandler, AZ is seeking a Sr. Principal Design Engineer to lead the RF switch and LNA design for mobile applications.

You will drive transistor-level RFIC development from concept through release with cross-functional support from management, layout, reliability, and test teams. The ideal candidate holds a BSEE (MSEE preferred), 10+ years in RFIC design, strong Cadence layout experience, and proven expertise with HFSS/ADS FEM and RF measurements.

Qualifications

• BSEE degree required; MSEE preferred.
• 10+ years of experience in switch, LNA and/or RFIC design.
• Proven track record designing with Cadence including layout with strong background in various linear and nonlinear simulation techniques and simulators.
• Extensive experience mitigating parasitic effects from package or PCB relying on EM simulation including proficient use of HFSS, ADS FEM, or similar.
• Strong background with RF measurements and characterization including S-parameter, noise figure, harmonics, intermodulation distortion.
• Demonstrated experience in standard RF design techniques, debugging analog/RF/mixed signal noise issues, and RF coupling.
• Working knowledge of device physics, especially tradeoffs applying to switch and LNA designs.
• Excellent written and spoken communication skills.
• Ability to work independently or in a team.
• Knowledge of RF PA design and other large signal circuit design is considered a plus.
• Candidates with successful release of production switches or LNA for mobile applications would be highly considered.
• Competitive base salary commensurate with experience: $168,000 - $218,300 (subject to change dependent on physical location)*
• Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability.*
• Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.*

Responsibilities

• Perform transistor-level RFIC Design and product development of RF switches and/or LNA for cellular applications, potentially using SOI, GaAs, or technology.
• Support the design of analog blocks as needed (charge pump, LDOs, level shifters, bandgaps, etc.).
• Manage and present design trade-offs including performance, size, cost and time to market.
• Expert use of RF measurement equipment with the ability to troubleshoot measurement issues.
• Present design work during peer reviews including expected and/or actual results.
• Provide regular progress update to development team.
• Develop and execute project schedules and bring products to market on time.
• Contribute to cross functional continuous improvement efforts.

Skills

RF design

RFIC design

Cadence tools

S-parameter measurements

Communication skills

Independent work

Education

BSEE degree

MSEE preferred

Tools

HFSS

ADS FEM

Cadence

Job description

Qorvo Power in Chandler, AZ is seeking a Sr. Principal Design Engineer to lead the RF switch and LNA design for mobile applications.

You will drive transistor-level RFIC development from concept through release with cross-functional support from management, layout, reliability, and test teams. The ideal candidate holds a BSEE (MSEE preferred), 10+ years in RFIC design, strong Cadence layout experience, and proven expertise with HFSS/ADS FEM and RF measurements.