Senior Principal PLL IC Design Lead for Space Tech

Blue Origin; San Diego (CA); Hybrid; CAD 430,000 - 602,000; Full time

Benefits offered by this job

Medical, dental, vision insurance

401(k) with company match

Stock options

Paid time off

Parental leave

Job summary

Blue Origin in San Diego, CA is seeking a Senior Principal IC Design Engineer to lead PLLs and clocking in CMOS/SiGe processes for mmWave space applications. You will drive architecture, layout coordination, and tape-out readiness, collaborating with RF and SOC teams.

The role requires 15+ years of high-frequency PLL experience, strong signal integrity and verification skills, and mentoring of junior engineers. On-site with potential relocation and travel up to 10%.

Qualifications

• 15+ years in design of high-frequency (>20GHz) PLLs for RF/mmWave
• Proven loop design for phase noise, jitter, spur, power optimization
• Experience with clock-domain synchronization in multi-PLL systems
• Proficiency in mixed-signal RF modeling, simulation and verification

Responsibilities

• Lead design, development and integration of PLLs and clocking in CMOS FinFET/SiGe
• Use Spectre/AMS flows to develop high-performance PLL circuits
• Collaborate with RF and SOC architects to meet system specs
• Oversee layout, top-level integration, floorplanning and tape-out readiness
• Develop test plans with validation and product engineers for bring-up
• Mentor junior engineers in analog design best practices

Skills

PLL design

RF/mmWave analog

Clock distribution

Spectre/AMS modeling

SystemVerilog

Mentoring

Education

Bachelor's degree in Electrical Engineering

MS/PhD preferred

Tools

MATLAB

Spectre

SystemVerilog

AMS

Job description

Blue Origin in San Diego, CA is seeking a Senior Principal IC Design Engineer to lead PLLs and clocking in CMOS/SiGe processes for mmWave space applications. You will drive architecture, layout coordination, and tape-out readiness, collaborating with RF and SOC teams.

The role requires 15+ years of high-frequency PLL experience, strong signal integrity and verification skills, and mentoring of junior engineers. On-site with potential relocation and travel up to 10%.