Stand out for this role — generate a tailored resume and cover letter in about a minute.
Cadence Design Systems in San Jose, CA is seeking a Sr Principal Design Engineer to lead mixed-signal circuit design, verification, and testing for high-speed serial-link IP. The role requires a Ph.D.
in EE with 5+ years or MS in EE with 7+ years in advanced process technologies, and strong collaboration with the digital team to meet performance targets. The ideal candidate will drive architectural decisions, develop test plans, and contribute to product readiness with excellent communication
Cadence Design Systems in San Jose, CA is seeking a Sr Principal Design Engineer to lead mixed-signal circuit design, verification, and testing for high-speed serial-link IP. The role requires a Ph.D.
in EE with 5+ years or MS in EE with 7+ years in advanced process technologies, and strong collaboration with the digital team to meet performance targets. The ideal candidate will drive architectural decisions, develop test plans, and contribute to product readiness with excellent communication