Senior Power Systems Architect - Chipset & SOC

Qualcomm; Austin (TX); On-site; USD 187,000 - 280,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an experienced Chipset Power System Engineer to lead cross-functional teams in modeling SOC/chipset power and delivering power-optimized Snapdragon solutions.

You will influence power design across architecture, software, hardware, and silicon processes to achieve world-class low power performance. The role involves guiding design cycles, collaborating with systems, software, and test teams, and addressing customer power requirements with innovative

Qualifications

• Analysis and design of low power features at SOC, chipset or platform level.
• Architectural knowledge in application processor, modem processor, AR/VR, ML, IoT, automotive or computing.
• Hardware or software design or optimizations of low power features.
• System level power modeling and analysis.

Responsibilities

• Power architecture and tradeoff analysis.
• Chipset and system level power modeling, analysis and optimization for SOC, chipset and platform solutions.
• Identify power requirements and quantify power gap/risk areas.
• Optimize power efficiency and performance of present generation designs and help architect future products.
• Guide multi-function groups through the design cycle in realizing power targets.
• Design of power features and work with cross functional teams (systems, software, hardware, silicon process, production test, etc.).
• Customer interaction to advertise capabilities of the chipset and address power requirements.
• Power modeling of customer-specific use cases and designs.

Skills

Power architecture

SOC power modeling

Low power design

System-level analysis

Education

Master’s degree in Electrical Engineering

Job description

Qualcomm Technologies, Inc. is seeking an experienced Chipset Power System Engineer to lead cross-functional teams in modeling SOC/chipset power and delivering power-optimized Snapdragon solutions.

You will influence power design across architecture, software, hardware, and silicon processes to achieve world-class low power performance. The role involves guiding design cycles, collaborating with systems, software, and test teams, and addressing customer power requirements with innovative