Lead Power Systems Engineer for Snapdragon Compute Chipsets

Qualcomm; Santa Clara (CA); On-site; USD 217,000 - 325,000; Full time

Job summary

Qualcomm Technologies, Inc. seeks an experienced Chipset Power System Engineer to solve power challenges and optimize power for Snapdragon Compute Chipsets.

The role leads multi-disciplinary teams to model SOC power and deliver hardware/software power optimization. Requirements include a Master’s degree in Electrical Engineering and 10+ years of relevant experience in power design, modeling, and system-level analysis.

Qualifications

• Master’s degree in Electrical Engineering or equivalent field.
• 10+ years of professional experience in power/low power design preferred.
• Experience with SOC or chipset power modeling and analysis.
• Knowledge of ML for compute applications is a plus.

Responsibilities

• Power architecture and tradeoff analysis across SOC and chipset.
• Model, analyze and optimize chipset/system power for platforms.
• Identify power gaps and quantify associated risks.
• Improve power efficiency and performance of current designs.
• Guide cross-functional teams through power targets during design cycles.
• Design power features and coordinate with systems, software, hardware teams.
• Interact with customers to address power requirements and showcase capabilities.
• Model power for customer-specific use cases and designs.

Skills

Power architecture

SOC power modeling

Low power design

Hardware optimization

Software optimization

System power analysis

Machine learning for compute

Education

Master’s degree in Electrical Engineering

Job description

Qualcomm Technologies, Inc. seeks an experienced Chipset Power System Engineer to solve power challenges and optimize power for Snapdragon Compute Chipsets.

The role leads multi-disciplinary teams to model SOC power and deliver hardware/software power optimization. Requirements include a Master’s degree in Electrical Engineering and 10+ years of relevant experience in power design, modeling, and system-level analysis.