Chipset Power Architect — SOC Efficiency Leader

Qualcomm; San Diego (CA); On-site; USD 179,000 - 268,400; Full time

Benefits offered by this job

Annual discretionary bonus

RSU grants

Comprehensive benefits package

Job summary

Qualcomm is seeking an experienced Chipset Power System Engineer in San Diego, California, to tackle power challenges in Snapdragon chipsets. You will guide a cross-functional team to model and optimize power efficiency, achieving world-class performance.

Your role involves leading efforts in power architecture, managing cross-functional groups, and engaging customers for tailored solutions. A master's degree in Electrical Engineering and extensive professional experience in low-power feature analysis are essential.

Qualifications

• Master’s degree in Electrical Engineering or equivalent is required.
• 15+ years of professional experience in low-power feature design.
• Strong architectural knowledge in application or modem processors.

Responsibilities

• Conduct power architecture and trade-off analysis.
• Perform chipset level power modeling and optimization.
• Guide design projects to achieve power efficiency targets.

Skills

Low-power features analysis

Power modeling and optimization

Cross-functional collaboration

Education

Master’s degree in Electrical Engineering

Job description

Qualcomm is seeking an experienced Chipset Power System Engineer in San Diego, California, to tackle power challenges in Snapdragon chipsets. You will guide a cross-functional team to model and optimize power efficiency, achieving world-class performance.

Your role involves leading efforts in power architecture, managing cross-functional groups, and engaging customers for tailored solutions. A master's degree in Electrical Engineering and extensive professional experience in low-power feature analysis are essential.