Senior Power Architect for Data Center AI Hardware

MatX

Mountain View (CA)

Híbrido

USD 160.000 - 600.000

Jornada completa

14 días+
Generador de candidaturas

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Ventajas ofrecidas por este puesto de trabajo

4 weeks PTO (accrued)
Remote work up to 3 weeks
Company-subsidized medical insurance
401K with company contributions
Life insurance
Professional development budget

Descripción de la vacante

MatX is seeking a Power Engineer to join the Hardware System team to define, design, and validate the complete power architecture for our rack-scale AI data center product. The role covers power delivery from the rack level to the chip, focusing on efficiency, scalability, and performance.

The position requires deep experience in high-power topology, lab bring-up, and collaboration with silicon, system, thermal, and mechanical teams.

Formación

  • 10–15 years of power design experience.
  • Experience with high-power topology topologies (buck DC-DC converters, multi-phase VRMs, vertical delivery).
  • Experience with lab bring-up, debugging, and design validation.
  • Strong communication and teamwork skills.

Responsabilidades

  • Collaborate with silicon, system, thermal, mechanical, and JDM partners to bring power solutions from concept to production.
  • Develop power specifications, management strategy, and power estimation models.
  • Implement voltage regulator designs meeting silicon and system specs.
  • Validate complex VRMs in the lab during silicon bring-up with rigorous tests.
  • Ensure designs meet industry standards and safety/thermal regs.
  • Provide leadership and guidance during board and system integration.

Conocimientos

Power design
Voltage regulator design
DC-DC converters
VRMs
HSPICE
Simplis
Allegro
Lab bring-up
Team leadership
Thermal awareness

Herramientas

Simplis
HSPICE
Allegro

Descripción del empleo

MatX is seeking a Power Engineer to join the Hardware System team to define, design, and validate the complete power architecture for our rack-scale AI data center product. The role covers power delivery from the rack level to the chip, focusing on efficiency, scalability, and performance.

The position requires deep experience in high-power topology, lab bring-up, and collaboration with silicon, system, thermal, and mechanical teams.

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