Senior PMIC Digital Design Architect & Verification Lead

Socket.dev; Chandler (AZ); On-site; USD 140,000 - 210,000; Full time

Job summary

NXP in the United States is seeking a Senior Digital IC Design Lead to drive architecture, RTL development, and verification for next-generation PMICs used in automotive and industrial applications.

You will lead digital design from concept through silicon bring-up, coordinating across analog, verification, validation, and customer-facing teams to deliver high-quality mixed-signal solutions. Strong leadership and Verilog/SystemVerilog expertise are required.

Qualifications

• M.S. in Electrical Engineering, Computer Engineering, or related field.
• Minimum 12 years of experience in digital IC design and development with leadership.
• Strong understanding of digital design fundamentals, finite state machines, clock-domain crossing, reset architecture, and low-power design techniques.
• Expertise in RTL design using Verilog/SystemVerilog for complex digital and mixed-signal ICs.
• Experience with synthesis, static timing analysis, equivalence checking, DFT, and physical implementation flows.
• Strong knowledge of modern verification methodologies, including UVM, assertions, formal verification, and coverage-driven verification.
• Experience developing digital controllers for PMICs, power management systems, automotive electronics, or industrial applications is highly desirable.
• Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA.

Responsibilities

• Review product requirements, IP architecture specifications, programming models, microarchitecture, interfaces, and implementation plans for automotive and industrial PMIC applications.
• Define and implement digital architectures for mixed-signal PMICs, ensuring alignment with system, performance, quality, reliability, safety, power, and area requirements.
• Lead digital design activities from architecture definition through RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up, and production release.
• Design and develop digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing, and fault management functions for PMIC and power conversion products.
• Develop and review RTL, microarchitecture, and design specifications using Verilog/SystemVerilog and industry-standard design and quality checking tools.
• Drive verification strategy and execution, including test planning, simulation, formal verification, coverage analysis, regression management, and achievement of NXP quality and maturity standards.
• Deliver complete IP solutions, including RTL, verification collateral, supporting documentation, and requirements traceability from specification through implementation.
• Track development metrics including milestones, code and functional coverage, defect resolution, and compliance with design requirements.
• Support silicon debug, characterization, qualification, reliability validation, and production ramp activities.
• Mentor junior engineers and drive continuous improvement in design methodologies, automation flows, and engineering best practices.

Skills

RTL design

Verilog/SystemVerilog

Digital IC design

UVM / formal verification

Synthesis / STA / DFT

EDA tools (Cadence/Synopsys/Siemens)

Digital controllers for PMICs

Power management systems

Leadership / mentoring

Communication

Education

M.S. in Electrical Engineering or related field

Tools

Cadence

Synopsys

Siemens EDA

Job description

NXP in the United States is seeking a Senior Digital IC Design Lead to drive architecture, RTL development, and verification for next-generation PMICs used in automotive and industrial applications.

You will lead digital design from concept through silicon bring-up, coordinating across analog, verification, validation, and customer-facing teams to deliver high-quality mixed-signal solutions. Strong leadership and Verilog/SystemVerilog expertise are required.