Senior Physical Design Engineer – Networking SoC Lead

NVIDIA Corporation; Westford (MA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation in Westford, MA is seeking a Senior Physical Design Engineer to lead all aspects of SOC physical design for networking silicon. You will drive partition and chiplet-level implementations, flow automation, floorplanning, power/clock distribution, and tapeout-ready timing closure from RTL to GDSII.

The ideal candidate has a BSEE/MSEE, at least 5 years in VLSI physical design on advanced nodes (5nm/4nm/3nm), and a proven production-ready design delivery record.

Qualifications

• BSEE / MSEE or equivalent experience.
• 5+ years of VLSI physical design implementation on advanced nodes.
• Proven track record delivering designs to production.
• Experience with P&R, timing closure, IR drop, and physical verification.
• Proficiency with CAD tools from Synopsys and Cadence; scripting is a plus.

Responsibilities

• Lead all aspects of physical design and implementation of SOC devices.
• Work at partition and chiplet level; develop flows and automation.
• Floorplanning, power/clock distribution, P&R, timing closure.
• RTL-to-GDSII flow, power/noise analysis and physical verification.

Skills

Analytical skills

Team collaboration

Scripting (Python)

Education

BSEE / MSEE or equivalent

Tools

Synopsys ICC2/DC/PT/STAR/ICV

Cadence Genus/Innovus/Tempus

Job description

NVIDIA Corporation in Westford, MA is seeking a Senior Physical Design Engineer to lead all aspects of SOC physical design for networking silicon. You will drive partition and chiplet-level implementations, flow automation, floorplanning, power/clock distribution, and tapeout-ready timing closure from RTL to GDSII.

The ideal candidate has a BSEE/MSEE, at least 5 years in VLSI physical design on advanced nodes (5nm/4nm/3nm), and a proven production-ready design delivery record.