Senior Physical Design Engineer, High‑Speed ASIC

ALTEN; San Diego (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

ALTEN is looking for a Physical Design Engineer in San Diego. You will develop, implement, and verify high-speed processor cores, requiring expertise in STA closure and Place and Route. Candidates should have 8-12 years of experience in Physical Design and a Bachelor's degree in a relevant field. The role demands deep knowledge of tools like Cadence Innovus and Synopsys ICC2. This position is on-site once the staff returns to campus, offering an opportunity to work on cutting-edge FinFet technologies.

Qualifications

• Candidates must have 8-12 years of direct relevant experience in Physical Design.
• This position requires 2-5 years of experience with STA closure and Place and Route.
• Hands on experience with the latest FinFet technologies (20nm and below) is needed.

Responsibilities

• Develop, implement, and verify high-speed processor cores using state-of-the-art tools.
• Responsible for the complete Physical Design Flow for high-speed processor cores.
• Debugging timing violations for multi-mode and multi-corner designs.

Skills

STA closure

Place and Route

Functional verification

Scripting (PERL/TCL)

Linux/Unix shell

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Electrical Engineering

Tools

Cadence Innovus

Synopsys ICC2

Synopsys PTSI

Job description

ALTEN is looking for a Physical Design Engineer in San Diego. You will develop, implement, and verify high-speed processor cores, requiring expertise in STA closure and Place and Route. Candidates should have 8-12 years of experience in Physical Design and a Bachelor's degree in a relevant field. The role demands deep knowledge of tools like Cadence Innovus and Synopsys ICC2. This position is on-site once the staff returns to campus, offering an opportunity to work on cutting-edge FinFet technologies.