Senior Physical Design Engineer (2nm/3nm/5nm)

Quest Global; San Jose (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Quest Global offers engineering roles focused on advanced semiconductor physical design, delivering on 2nm/3nm/5nm projects with Cadence Innovus/Atop. You will work closely with RTL and DFT teams, use TCL scripting to automate placement and routing, and ensure critical checks like LVS/DRC, STA and power integrity are met.

We are seeking engineers with MSEE/MSCS (8+ years) or BSEE/BSCS (10+ years) and strong scripting skills in TCL/Python.

Qualifications

• MSEE/MSCS with 8+ years experience (BSEE/BSCS 10+ years)
• Expertise in Cadence Innovus/Atop physical design tools
• Experience with Calibre LVS/DRC
• Low power and signal integrity experience
• Work closely with RTL & DFT designers
• Strong TCL/Python scripting knowledge; Perl is a plus
• Good debugging skills and ability to work around issues

Responsibilities

• Perform physical design of 2nm/3nm/5nm using state-of-the-art EDA tools
• Create floorplans, powerplans, CTS and routing to meet specs
• Write TCL scripts to automate placements, clock tree adjustments, routing
• Collaborate with designers to ensure STA/IR/EM/LVS/DRC goals are met

Skills

TCL scripting

Python scripting

Debug skills

Strong RTL/DFT collaboration

Education

MSEE/MSCS

BSEE/BSCS

Tools

Cadence Innovus/Atop

Calibre LVS/DRC

Job description

Quest Global offers engineering roles focused on advanced semiconductor physical design, delivering on 2nm/3nm/5nm projects with Cadence Innovus/Atop. You will work closely with RTL and DFT teams, use TCL scripting to automate placement and routing, and ensure critical checks like LVS/DRC, STA and power integrity are met.

We are seeking engineers with MSEE/MSCS (8+ years) or BSEE/BSCS (10+ years) and strong scripting skills in TCL/Python.