Senior Photonic Layout Engineer - Tape-out & SoC Flow Lead

Acceler8 Talent; Berkeley (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Acceler8 Talent is aiding an early-stage photonic computing company in Berkeley to hire a Senior Photonic Layout Engineer. The role centers on owning the photonic layout and tape-out flow, integrating PIC development with electronic IC work, and establishing a Cadence workflow for a 45 nm process.

You will implement photonic and electronic layout, manage netlisting, DRC/LVS, and ensure designs meet manufacturing requirements while collaborating with a small, technically deep founding team.

Qualifications

• Direct PIC design ownership of layout implementation and sign-off.
• Hands-on Cadence expertise in photonics and electronics design flows.
• Experience taking commercial photonic designs toward tape-out with design sign-off accountability.
• Practical ownership of foundry PDKs, design rules, netlisting, DRC/LVS.

Responsibilities

• Own the photonic layout flow from design implementation and routing through verification and tape-out release.
• Establish a Cadence Photonics workflow for the target process compatible with electronic IC design flow.
• Implement photonic and electronic layout and routing within Cadence, resolving interfaces between domains.
• Own netlisting, DRC/LVS and foundry/PDK integration, ensuring manufacturability.

Skills

PIC layout ownership

Cadence experience

DRC/LVS verification

Foundry PDK integration

Silicon-photonics physics

Cross-domain integration

Tape-out ownership

Tools

Cadence Photonics

PDK compatibility

Layout verification tools

Job description

Acceler8 Talent is aiding an early-stage photonic computing company in Berkeley to hire a Senior Photonic Layout Engineer. The role centers on owning the photonic layout and tape-out flow, integrating PIC development with electronic IC work, and establishing a Cadence workflow for a 45 nm process.

You will implement photonic and electronic layout, manage netlisting, DRC/LVS, and ensure designs meet manufacturing requirements while collaborating with a small, technically deep founding team.