Senior Photonics Engineer - PIC Lead & Tapeout Architect

SiLC Technologies, Inc; California; On-site; USD 150,000 - 190,000; Full time

Benefits offered by this job

Stock options

Health/vision/dental insurance

401(k)

Job summary

SiLC Technologies, Inc. is actively seeking a Senior Photonics Engineer to lead PIC design from architecture through tapeout for silicon photonics products.

You will drive system-level decisions, mentor the layout team, and interface with foundries to ensure successful tapeouts and product integration. The ideal candidate has 5+ years in silicon photonics, a strong track record leading PIC tapeouts end-to-end, and deep experience with photonic simulation tools and layout collaboration.

Qualifications

• Degree in Photonics, Applied Physics, Optical Engineering, or related field with 5+ years in silicon photonics.
• Demonstrated PIC lead experience from architecture through tapeout and test.
• Strong photonic system design background including link budgets and loss analysis.
• Experience with photonic simulation tools and direct collaboration with layout/foundry teams.
• Excellent communication and leadership to coordinate with senior management and partners.

Responsibilities

• Act as PIC lead, owning design from architecture to tapeout and product integration.
• Define photonic system architectures, budgets, and performance targets.
• Design and simulate PIC circuits and components (waveguides, couplers, modulators, detectors).
• Direct layout team, review DRC/LVS and tapeout readiness.
• Coordinate with foundries and partners to meet tapeout schedules.

Skills

PIC lead

Photonic system design

Layout coordination

Python for simulation

Education

Photonics or related field

Tools

Lumerical FDTD

Lumerical MODE

Lumerical INTERCONNECT

PICS3D

Ansys

Job description

SiLC Technologies, Inc. is actively seeking a Senior Photonics Engineer to lead PIC design from architecture through tapeout for silicon photonics products.

You will drive system-level decisions, mentor the layout team, and interface with foundries to ensure successful tapeouts and product integration. The ideal candidate has 5+ years in silicon photonics, a strong track record leading PIC tapeouts end-to-end, and deep experience with photonic simulation tools and layout collaboration.