Senior Photonics IC Layout & Tape-out Lead

Acceler8 Talent

Berkeley (CA)

On-site

USD 180,000 - 240,000

Full time

21 hours ago
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Job summary

Acceler8 Talent is seeking a senior Photonic IC Layout & Design Flow Engineer to own the PIC layout, verification, signoff and tape-out, connecting photonic designs with electronic IC development, packaging and silicon validation.

You will establish and drive a Cadence Photonics workflow for GlobalFoundries’ 45 nm process, coordinate component designers, and ensure a complete, manufacturable PIC delivery from layout through tape-out.

Qualifications

  • At least one complete industry PIC tape-out with chip-level layout, verification and signoff.
  • Strong practical experience with Cadence Photonics, Virtuoso or similar PIC flow.
  • Experience building or improving design flows, not just using an existing workflow.
  • Solid understanding of silicon-photonics device physics with design/simulation.
  • Collaborating with electronic IC, packaging and characterization engineers.

Responsibilities

  • Own chip-level layout, component integration, DRC/LVS, signoff and tape-out readiness.
  • Build and improve PDK, layout and verification workflows for repeatable chip delivery.
  • Make photonic design flow compatible with electronic IC work underway.
  • Resolve layout and interface requirements across PICs, EICs and packaging.
  • Work with measurement teams to connect silicon results with design improvements.
  • Provide technical direction while remaining hands-on with implementation and verification.

Skills

Cadence Photonics
Virtuoso
PIC layout
DRC/LVS
Team leadership

Tools

PDK development
CAD tooling automation

Job description

Acceler8 Talent is seeking a senior Photonic IC Layout & Design Flow Engineer to own the PIC layout, verification, signoff and tape-out, connecting photonic designs with electronic IC development, packaging and silicon validation.

You will establish and drive a Cadence Photonics workflow for GlobalFoundries’ 45 nm process, coordinate component designers, and ensure a complete, manufacturable PIC delivery from layout through tape-out.

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