Senior PCIe PHY/Link Engineer – Bring-Up & Debug

Samsung Semiconductor Inc.; San Jose (CA); On-site; USD 163,000 - 253,000; Full time

Benefits offered by this job

Incentives

4+ weeks PTO

Medical/Dental/Vision/401k

Charitable giving match

Fertility/adoption support

Mental health resources

Onsite cafe & gym

Flexible benefits

Job summary

Samsung Semiconductor, Inc. in San Jose, CA seeks a dynamic engineer to develop and support Enterprise and Data Center SSD products.

You will work across the PCIe stack from PHY to Transaction layers, applying hardware/firmware design and debugging skills to ensure robust link bring-up and data integrity. The ideal candidate has 8+ years in hardware/firmware with strong PCIe protocol knowledge and embedded C/C++.

Qualifications

• BS in Computer/Electrical/Electronic Engineering or Computer Science required; 8+ years hardware/firmware exp., or MS with 5+ years.
• Deep proficiency with the PCIe protocol across Physical/Data Link/Transaction layers.
• Strong LTSSM, link training/equalization, PCIe enumeration, flow control, retry and AER handling.
• Working knowledge of PHY-layer operation and debug tools to root-cause issues crossing PHY/Link.
• Solid experience in embedded C/C++ and debugging with UART/JTAG/ICE.
• Experience with PCIe protocol analyzers and signal analyzers for debugging.

Responsibilities

• Understand PCIe PHY/Link architecture and implement/integrate PCIe stack across layers.
• Own LTSSM behavior, link training/equalization sequencing, and device bring-up workflows.
• Analyze and validate TLP/DLLP handling, flow control, credits, and replay/retry mechanics.
• Debug complex PHY/Link/Transport issues during NVMe SSD bring-up and validation from Gen1 to Gen7.
• Support industry PHY/Link compliance tests and participate in PCI-SIG events.
• Provide onsite field support for PHY/Link tasks at customer sites and labs.
• Travel up to 25% as required.

Skills

PCIe protocol

LTSSM

PCIe enumeration

C/C++ embedded

UART/JTAG/ICE debugging

PCIe analyzers

Hardware/firmware

Education

BS in Computer/Electrical/Electronic Engineering or CS

MS in a related field (preferred)

Tools

UART debugging tools

Logic analyzers

PCIe protocol analyzers

Job description

Samsung Semiconductor, Inc. in San Jose, CA seeks a dynamic engineer to develop and support Enterprise and Data Center SSD products.

You will work across the PCIe stack from PHY to Transaction layers, applying hardware/firmware design and debugging skills to ensure robust link bring-up and data integrity. The ideal candidate has 8+ years in hardware/firmware with strong PCIe protocol knowledge and embedded C/C++.