Senior PCB Signal & Power Integrity Engineer

Teradyne; Reading, Northern (MA, KY); On-site; USD 120,000 - 180,000; Full time

Job summary

Teradyne in North Reading, MA seeks a PCB Signal and Power Integrity Hardware Engineer to advance high-speed interconnects. You will develop scripts to speed setup with Cadence tools and support PCB layout through floorplanning and stack-up trade-offs.

You'll partner with hardware design teams to tackle challenging SI/PI problems and ensure designs survive bring-up and verification with priority simulations.

Qualifications

• BS or MS in Electrical Engineering or Electrical and Computer Engineering.
• Minimum 15 years of experience (internships not included).
• Strong background with Cadence/Ansys/Mentor Graphics or Keysight signal extraction tools.
• Expertise in Transmission-Line Theory, EM fields and high-speed interconnects.
• Proficient in MS Office; MATLAB or Python is a plus.

Responsibilities

• Develop custom code/scripts to speed up setup using Cadence tools.
• Support PCB Layout with floorplanning and stack-up trade-offs; define routing constraints.
• Collaborate with HW design teams to solve high-speed SI/PI problems to meet specs.
• Organize and execute high-priority simulations to prevent design escapes during bring-up and verification.

Skills

Transmission-Line Theory

Frequency Domain evaluation

Time Domain evaluation

EM Fields

Organizational skills

Communication

Team collaboration

Lab measurements

Leadership experience

Education

BS or MS in Electrical Engineering or Electrical and Computer Engineering

Tools

Cadence

Ansys

Mentor Graphics

Keysight signal extraction tools

MATLAB

Python

Tcl

MS PowerPoint

MS Excel

MS Word

Outlook

CoPilot

Job description

Teradyne in North Reading, MA seeks a PCB Signal and Power Integrity Hardware Engineer to advance high-speed interconnects. You will develop scripts to speed setup with Cadence tools and support PCB layout through floorplanning and stack-up trade-offs.

You'll partner with hardware design teams to tackle challenging SI/PI problems and ensure designs survive bring-up and verification with priority simulations.