Senior Hardware Engineer: High-Speed PCB & SI/PI

Teradyne Inc.

North Reading (MA)

On-site

USD 120,000 - 190,000

Full time

14 days+

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Job summary

Teradyne is seeking a PCB Signal and Power Integrity Hardware Engineer in North Reading, MA. The role focuses on developing scripts to optimize setups with Cadence, supporting layout decisions, and partnering with hardware design teams to tackle high-speed signal and power integrity challenges.

The candidate will ensure bring-up success through rigorous simulations and verification, leveraging tools like Cadence, Ansys, and Mentor Graphics.

Qualifications

  • BS or MS in Electrical Engineering or Electrical and Computer Engineering.
  • Minimum 15 years of experience (internships not included).
  • Experience with Cadence, Ansys, Mentor Graphics or Keysight signal extraction tools.
  • Proficiency in Transmission-Line Theory, Frequency and Time Domain evaluation, and EM Fields.
  • Proficiency in MS PowerPoint, Excel, Word, Outlook, and Copilot.
  • MATLAB and Python experience is a plus.
  • Some lab measurements experience preferred.
  • Leadership experience is a plus.

Responsibilities

  • Develop custom code and scripts to speed set-up using Cadence tools or develop software utilities to improve efficiency.
  • Support PCB Layout via Floorplanning and Stack-up trade-offs and define routing constraints.
  • Collaborate with HW circuit design teams to solve high-speed SI and PI problems to meet tight specs.
  • Organize and execute high-priority simulations to prevent design escapes during bring-up and design verification.

Skills

Transmission-Line Theory
Frequency & Time Domain
Electromagnetic Fields
Team Leadership
Lab Measurements
MS Office Suite
Python
MATLAB
CoPilot

Education

BS or MS in Electrical Engineering or Electrical and Computer Engineering

Tools

Cadence
Ansys
Mentor Graphics
Keysight
Allegro
Sigrity
HyperLynx
EM Pro
SI Pro

Job description

Teradyne is seeking a PCB Signal and Power Integrity Hardware Engineer in North Reading, MA. The role focuses on developing scripts to optimize setups with Cadence, supporting layout decisions, and partnering with hardware design teams to tackle high-speed signal and power integrity challenges.

The candidate will ensure bring-up success through rigorous simulations and verification, leveraging tools like Cadence, Ansys, and Mentor Graphics.

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