Principal SI/PI Design Engineer

USA Tech Recruit

New Jersey

On-site

USD 110,000 - 140,000

Full time

14 days+
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

USA Tech Recruit seeks an experienced Principal Signal Integrity / Power Integrity Design Engineer to lead advanced package design efforts for next-generation semiconductor products in New Jersey. This role involves overseeing package architecture, signal integrity, power integrity, and RF performance.

The ideal candidate will have a Bachelor's degree in Electrical Engineering or a related field, along with 5+ years of relevant experience. Strong expertise in high-speed electrical design principles is essential, along with proficiency in design tools such as Cadence APD and HFSS.

Qualifications

  • 5+ years of hands-on experience in IC package design and development.
  • Strong expertise in signal integrity, power integrity, and high-speed electrical design principles.
  • Proven experience leading package development programs from concept through production.

Responsibilities

  • Lead package selection and architecture decisions for next-generation semiconductor products.
  • Evaluate performance, manufacturability, feasibility, and cost tradeoffs across package technologies.
  • Own package and substrate design activities from concept through tape-out.

Skills

Signal integrity
Power integrity
High-speed electrical design
Analytical problem-solving

Education

Bachelor's degree in Electrical Engineering, Physics, or a related discipline

Tools

Cadence APD
Xpedition Package Designer
HFSS
SIWave

Job description

Our client is a global leader in communications, networking, and advanced semiconductor technologies, developing next‑generation solutions that enable high‑bandwidth connectivity, optical communications, and data‑intensive computing applications. With a strong focus on innovation across silicon, photonics, packaging, and system design, the company is investing heavily in cutting‑edge products that push the boundaries of performance, efficiency, and scalability.

They are looking for an experienced Principal Signal Integrity / Power Integrity Design Engineer to lead advanced package design and electrical integration efforts for next‑generation high‑speed semiconductor and photonic products. This is a highly visible technical leadership role focused on package architecture, signal integrity, power integrity, RF performance, and advanced packaging technologies supporting complex mixed‑signal systems.

Key Responsibilities
  • Lead package selection and architecture decisions for next‑generation semiconductor products, including package structures, BGA configurations, and system‑in‑package (SiP) solutions.
  • Evaluate performance, manufacturability, feasibility, and cost tradeoffs across package technologies.
  • Own package and substrate design activities from concept through tape‑out, including layout, optimization, verification, and sign‑off.
  • Perform signal integrity (SI), power integrity (PI), and RF simulations to optimize package and substrate performance.
  • Analyze high‑speed interfaces and power delivery networks, identifying and resolving electrical performance bottlenecks.
  • Partner closely with silicon design, photonics, RF, manufacturing, and supplier teams to optimize floorplans, bump maps, and package pin assignments.
  • Drive design‑for‑manufacturing reviews and collaborate with external packaging vendors and manufacturing partners on new product development and production support.
  • Provide technical leadership across multidisciplinary engineering teams to ensure successful product execution from concept through production.
Key Qualifications
  • Bachelor's degree in Electrical Engineering, Physics, or a related technical discipline.
  • 5+ years of hands‑on experience in IC package design and development.
  • Strong expertise in signal integrity, power integrity, and high‑speed electrical design principles.
  • Proven experience leading package development programs from concept through production.
Preferred Experience
  • Experience designing package substrates for RF, high‑speed digital, and mixed‑signal products.
  • Knowledge of advanced packaging technologies including 2.5D integration, 3D packaging, and interposer‑based architectures.
  • Experience with package design tools such as Cadence APD and/or Xpedition Package Designer (XPD).
  • Expertise with SI/PI and electromagnetic simulation tools including HFSS, SIWave, or equivalent platforms.
  • Familiarity with electrical design reviews, SI/PI analysis reviews, package qualification, and manufacturing processes.
  • Experience collaborating with external suppliers, packaging vendors, and contract manufacturers.
What Makes a Strong Candidate
  • Strong engineering fundamentals and analytical problem‑solving skills.
  • Ability to solve complex multidisciplinary challenges spanning silicon, packaging, RF, and manufacturing.
  • Proven technical ownership and ability to drive projects to successful completion.
  • Excellent cross‑functional communication and collaboration skills.
  • Detail‑oriented mindset with a focus on performance, quality, and reliability.

By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice https://eu-recruit.com/wp-content/uploads/2024/07/European-Tech-Recruit-Privacy-Notice-2024.pdf

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Principal SI/PI Design Engineer — High‑Speed Packaging
Principal SI/PI Design Engineer — High‑Speed Packaging

USA Tech Recruit • New Jersey

On-site
USD 110,000 - 140,000
Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging
Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging

Annapurna Labs (U.S.) Inc. • Austin (TX)

On-site
USD 130,000 - 185,000
Package & SI/PI - Signal and Power Integrity Engineer
Package & SI/PI - Signal and Power Integrity Engineer

Eliyan Corporation • San Francisco (CA)

On-site
USD 120,000 - 150,000
Excellent benefits
Fun work environment
Staff Power Integrity Engineer
Staff Power Integrity Engineer

Arm • Chandler (AZ)

On-site
USD 198,000 - 268,000
Private medical insurance for employee and family
20-day sabbatical every four years
Supplementary pension
Advanced IC Package Engineer
Advanced IC Package Engineer

Gsme • San Jose (CA), Northern (KY)

Hybrid
USD 110,000 - 170,000
High-Speed Package Design Engineer
High-Speed Package Design Engineer

NOKIA • New Providence (NJ)

On-site
USD 100,000 - 130,000
Principal SI/PI Design Engineer
Principal SI/PI Design Engineer

Ciena • New Providence (NJ)

On-site
USD 148,000 - 238,000
Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal
Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal

Eliyan Corporation • San Francisco (CA)

On-site
USD 120,000 - 160,000
Excellent benefits
Fun work environment
Senior/Principal Signal Integrity Engineer-Silicon Photonics & AI Interconnects
Senior/Principal Signal Integrity Engineer-Silicon Photonics & AI Interconnects

Lumilens • San Jose (CA)

On-site
USD 130,000 - 180,000
Competitive salary
Comprehensive benefits package
Professional development opportunities
Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging
Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging

Amazon Web Services (AWS) • Cupertino (CA)

On-site
USD 157,000 - 213,000
Health insurance
RSUs supporting compensation
401(k) matching
+2