Senior or Principal Test Engineer, Texas Institute for Electronics
The University of Texas at Austin
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Benefits offered by this job
Job summary
The University of Texas at Austin is seeking a Senior or Principal Test Engineer to lead strategies in device test and measurement. Responsibilities include overseeing advanced packaging device testing and ensuring robust product performance through collaboration.
The ideal candidate will have significant experience in ATE development, strong technical skills, and the ability to work cross-functionally. This role offers competitive health benefits and opportunities for professional development.
Qualifications
- Five years hands-on experience in ATE test SW/HW development.
- Ability to drive test planning, creation and characterization.
- Knowledge of semiconductor design and validation methodologies.
Responsibilities
- Lead strategy and requirements for device test and measurement.
- Develop test platforms and methodologies for multiple technologies.
- Guide development of reliability models and failure analysis methodologies.
Skills
Education
Tools
Job description
Texas Institute for Electronics (TIE)
Austin, TX
Texas Institute for Electronics (TIE) is a transformative, well‑funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative. TIE advances the state of the art in 3D heterogeneous integration (3DHI), chiplet‑based architectures, and multi‑component microsystems, targeting microelectronics, artificial intelligence, quantum computing, high‑performance computing, and next‑generation healthcare devices.
- Lead and define the strategy and requirements for device test, measurement, and reliability functions in support of advanced packaging devices and technologies
- Develop and oversee test platforms and methodologies for ATE testing across a range of technologies including logic, memory, and advanced packaging devices
- Implement advanced test automation solutions and measurement systems to accelerate development and ensure first‑time‑right silicon
- Guide the development of reliability models, qualification plans, and failure analysis methodologies to ensure robust product performance
- Collaborate with cross‑functional teams to support end‑to‑end product enablement
- Serve as a senior technical leader and represent the organization in customer‑facing discussions and program reviews
- Support test infrastructure buildout, including fixture design, probe card specification, and lab setup
- Author test reports, standard operating procedures, and design‑for‑test guidelines to support ecosystem partners and internal engineering teams
- Bachelor’s of Science in Electrical Engineering or a related discipline with emphasis on ATE test and bench characterization
- At least five years of hands‑on experience in ATE test SW/HW development, characterization, or validation of ICs, modules, or packaged systems
- Ability to drive test planning, test creation, characterization, data analysis, and silicon debug
- Ability to develop and maintain engineering tools, automation frameworks, and validation infrastructure to support product bring‑up and characterization
- Demonstrated understanding of electromagnetic effects in advanced packaging—signal integrity, coupling, and loss across interposers, redistribution layers, and 3D stacked assemblies
- Ability to work cross‑functionally with design, packaging, EDA, and process teams in a fast‑paced R&D environment
- Able to initiate and implement best practices for test engineering workflows
- Experience with Advantest 93K ATE platforms
- Hands‑on experience with wafer‑level probing
- Location: Austin, Texas
- Master’s or Ph.D. in Electrical Engineering or a related discipline with emphasis on ATE test and bench characterization
- Ten or more years of hands‑on experience in ATE test SW/HW development, characterization, or validation of ICs, modules, or packaged systems
- Drive test planning, test creation, characterization, data analysis, and silicon debug
- Develop and maintain engineering tools, automation frameworks, and validation infrastructure to support product bring‑up and characterization
- Understanding of electromagnetic effects in advanced packaging—signal integrity, coupling, and loss across interposers, redistribution layers, and 3D stacked assemblies
- Ability to work cross‑functionally with design, packaging, EDA, and process teams in a fast‑paced R&D environment
- Initiate and implement best practices for test engineering workflows
- Hands‑on experience with wafer‑level probing and package testing
- Location: Austin, Texas
Relevant education and experience may be substituted as appropriate.
- Master’s or Ph.D. in Electrical Engineering or a related discipline
- More than five years of hands‑on experience in ATE test SW/HW development, characterization, or validation of ICs, modules, or packaged systems
- Strong technical writing and presentation skills for defense‑sector reporting and industry collaboration
- Experience in product development, validation, or related technical roles
- Proven track record of leading complex projects with significant business impact
- Strong knowledge of semiconductor design, validation methodologies, and system‑level debug
- Proficiency in scripting languages (Python, Perl, Java) and automation frameworks
- Familiarity with 3DHI design flows and the associated test challenges across heterogeneous die‑to‑die and die‑to‑interposer interfaces
- Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and their impact on test strategy and fixture design
- Experience developing automated test frameworks for production screening of 3DHI components
- Strong technical writing and presentation skills for defense‑sector reporting and industry collaboration
- Experience in product development, validation, or related technical roles
- Proven track record of leading complex projects with significant business impact
- Strong knowledge of semiconductor design, validation methodologies, and system‑level debug
- Proficiency in scripting languages (Python, Perl, Java) and automation frameworks
- Familiarity with 3DHI design flows and the associated test challenges across heterogeneous die‑to‑die and die‑to‑interposer interfaces
- Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and their impact on test strategy and fixture design
- Experience developing automated test frameworks for production screening of 3DHI components
- Hands‑on experience with Advantest 93K ATE platforms
TIE Pays Industry‑Competitive Salaries.
- Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
- Voluntary Vision, Dental, Life, and Disability insurance options
- Generous paid vacation, sick time, and holidays
- Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
- Additional voluntary retirement programs: Tax‑Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
- Flexible spending account options for medical and childcare expenses
- Robust free training access through LinkedIn Learning plus professional conference opportunities
- Tuition assistance
- Expansive employee discount program including athletic tickets
- Free access to UT Austin’s libraries and museums with staff ID card
- Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card
The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.
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