Senior or Principal Test Engineer, Texas Institute for Electronics

Phase2 Technology; Austin (TX); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Competitive health benefits

Generous paid vacation and sick time

Tuition assistance

Employee discount program

Job summary

Phase2 Technology is seeking a Senior or Principal Test Engineer to lead product strategies in Austin, Texas. This role requires strong expertise in ATE testing and collaborative skills to drive product realization. Candidates should possess a degree in Electrical Engineering and have extensive experience with semiconductor systems.

The position offers competitive health benefits, retirement plans with matching, and a supportive work environment that values continuous learning.

Qualifications

• At least five years of hands-on experience in ATE test SW/HW development.
• Ability to drive test planning, creation, characterization, and debugging.
• Demonstrated understanding of electromagnetic effects in packaging.

Responsibilities

• Lead and define the strategy and requirements for device testing.
• Develop and oversee test platforms for ATE testing.
• Guide the development of reliability models and qualification plans.

Skills

ATE test and bench characterization

Data analysis

Test automation

Signal integrity

Cross-functional collaboration

Technical writing

Education

Bachelor's of Science in Electrical Engineering

Master's or Ph.D. in Electrical Engineering

Tools

Advantest 93K ATE platforms

Scripting languages (Python, Perl, Java)

Job description

Senior or Principal Test Engineer, Texas Institute for Electronics

Texas Institute for Electronics (TIE) is a transformative, well-funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative.

Job Details

• Hiring Department: Texas Institute for Electronics
• Position Open To: All Applicants
• Weekly Scheduled Hours: 40
• FLSA Status: To Be Determined at Offer
• Earliest Start Date: Ongoing
• Position Duration: Expected to Continue
• Location: Austin, TX
• Must be eligible to work in the United States on a full-time basis for any employer without sponsorship.

Benefits

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card

Purpose

The Senior Test Engineer will support the strategy and introduction of products based on unique and highly differentiated capabilities of a preeminent foundry for semiconductor systems and defense electronics companies. They will bring deep technical expertise in ATE/ Test Bench and parametric testing, circuit theory, and test automation, as well as strategic insight into the development and reliability of semiconductor devices. This role will require strong leadership capabilities and the ability to operate at the intersection of technology innovation and product realization.

Responsibilities

• Lead and define the strategy and requirements for device test, measurement, and reliability functions in support of advanced packaging devices and technologies
• Develop and oversee test platforms and methodologies for ATE testing across a range of technologies including logic, memory, and advanced packaging devices.
• Implement advanced test automation solutions and measurement systems to accelerate development and ensure first-time-right silicon.
• Guide the development of reliability models, qualification plans, and failure analysis methodologies to ensure robust product performance.
• Collaborate with cross-functional teams to support end-to-end product enablement.
• Serve as a senior technical leader and represent the organization in customer-facing discussions and program reviews.
• Support test infrastructure buildout, including fixture design, probe card specification, and lab setup
• Author test reports, standard operating procedures, and design-for-test guidelines to support ecosystem partners and internal engineering teams.

Required Qualifications – Senior Test Engineer

• Bachelor's of Science in Electrical Engineering or a related discipline with emphasis on ATE test and bench characterization.
• At least five years of hands‑on experience in ATE test SW/HW development, characterization, or validation of ICs, modules, or packaged systems.
• Ability to drive test planning, test creation, characterization, data analysis, and silicon debug.
• Ability to develop and maintain engineering tools, automation frameworks, and validation infrastructure to support product bring‑up and characterization.
• Demonstrated understanding of electromagnetic effects in advanced packaging‑signal integrity, coupling, and loss across interposers, redistribution layers, and 3D stacked assemblies.
• Ability to work cross‑functionally with design, packaging, EDA, and process teams in a fast‑paced R&D environment.
• Able to initiate and implement best practices for test engineering workflows.
• Experience with Advantest 93K ATE platforms.
• Hands‑on experience with wafer‑level probing.
• Location: Austin, Texas.

Required Qualifications – Principal Test Engineer

• Master's or Ph.D. in Electrical Engineering or a related discipline with emphasis on ATE test and bench characterization.
• Ten or more years of hands‑on experience in ATE test SW/HW development, characterization, or validation of ICs, modules, or packaged systems.
• Drive test planning, test creation, characterization, data analysis, and silicon debug.
• Develop and maintain engineering tools, automation frameworks, and validation infrastructure to support product bring‑up and characterization.
• Understanding of electromagnetic effects in advanced packaging‑signal integrity, coupling, and loss across interposers, redistribution layers, and 3D stacked assemblies.
• Ability to work cross‑functionally with design, packaging, EDA, and process teams in a fast‑paced R&D environment.
• Initiate and implement best practices for test engineering workflows.
• Hands‑on experience with wafer‑level probing and package testing.
• Location: Austin, Texas.

Relevant education and experience may be substituted as appropriate.

Preferred Qualifications – Senior Test Engineer

• Master's or Ph.D. in Electrical Engineering or a related discipline.
• More than five years of hands‑on experience in ATE test SW/HW development, characterization, or validation of ICs, modules, or packaged systems.
• Strong technical writing and presentation skills for defense‑sector reporting and industry collaboration.
• Experience in product development, validation, or related technical roles.
• Proven track record of leading complex projects with significant business impact.
• Strong knowledge of semiconductor design, validation methodologies, and system‑level debug.
• Proficiency in scripting languages (Python, Perl, Java) and automation frameworks.
• Familiarity with 3DHI design flows and the associated test challenges across heterogeneous die‑to‑die and die‑to‑interposer interfaces.
• Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and their impact on test strategy and fixture design.
• Experience developing automated test frameworks for production screening of 3DHI components.

Preferred Qualifications – Principal Test Engineer

• Strong technical writing and presentation skills for defense‑sector reporting and industry collaboration.
• Experience in product development, validation, or related technical roles.
• Proven track record of leading complex projects with significant business impact.
• Strong knowledge of semiconductor design, validation methodologies, and system‑level debug.
• Proficiency in scripting languages (Python, Perl, Java) and automation frameworks.
• Familiarity with 3DHI design flows and the associated test challenges across heterogeneous die‑to‑die and die‑to‑interposer interfaces.
• Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and their impact on test strategy and fixture design.
• Experience developing automated test frameworks for production screening of 3DHI components.
• Hands‑on experience with Advantest 93K ATE platforms.

Salary Range

TIE Pays Industry-Competitive Salaries.

Working Conditions

• May work around standard office conditions
• Repetitive use of a keyboard at a workstation
• Use of manual dexterity (ex: using a mouse)

Required Materials

• Letter of Interest
• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor

Equal Opportunity Employer

The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.

Pay Transparency

The University of Texas at Austin will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. However, employees who have access to the compensation information of other employees or applicants as a part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the contractor's legal duty to furnish information.

Employment Eligibility Verification

If hired, you will be required to complete the federal Employment Eligibility Verification I‑9 form. You will be required to present acceptable and original documents to prove your identity and authorization to work in the United States. Documents need to be presented no later than the third day of employment. Failure to do so will result in loss of employment at the university.

E-Verify

The University of Texas at Austin use E‑Verify to check the work authorization of all new hires effective May 2015. The university's company ID number for purposes of E‑Verify is 854197. For more information about E‑Verify, please see the following:

• E‑Verify Poster (English and Spanish) [PDF]
• Right to Work Poster (English) [PDF]
• Right to Work Poster (Spanish) [PDF]

Background Checks

A criminal history background check will be required for finalist(s) under consideration for this position.

Retirement Plan Eligibility

The retirement plan for this position is Teacher Retirement System of Texas (TRS), subject to the position being at least 20 hours per week and at least 135 days in length. This position has the option to elect the Optional Retirement Program (ORP) instead of TRS, subject to the position being 40 hours per week and at least 135 days in length.

Employment Eligibility

Regular staff who have been employed in their current position for the last six continuous months are eligible for openings being recruited for through University‑Wide or Open Recruiting, to include both promotional opportunities and lateral transfers. Staff who are promotion/transfer eligible may apply for positions without supervisor approval.