Senior NPU Architect for Next-Gen SoCs

Samsungresearchamerica

Mountain View (CA)

On-site

USD 204,000 - 306,000

Full time

4 days ago
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Job summary

Samsung Research America seeks an accomplished NPU Architect to lead architectural and micro-architectural work for next‑gen SoCs. You will drive exploration, performance modeling, and HW/SW co-design while shaping power and area efficiency for Galaxy devices.

The role requires deep expertise in CNN/LLM models, Python/C++, and ML frameworks, with leadership across hardware and software teams in a high‑visibility setting.

Qualifications

  • Bachelor’s, Masters or PhD in Electrical, Computer Science, or related field.
  • 14+ years of experience in NPU architecture & development.
  • Hands-on experience in cycle-accurate performance and functional models.
  • Strong knowledge of CNN and LLM models.
  • Proficient in Python, System C and/or C++.
  • Experience with ML frameworks (TensorFlow, PyTorch, ONNX).
  • Experience in SoC micro-architecture and interface subsystems.
  • Self-motivated, team-oriented problem solver.

Responsibilities

  • Propose NPU architectural and micro-architectural features to boost PPA.
  • Perform high-level performance modeling and analysis of NPU features.
  • Develop cycle-accurate performance models and correlate with silicon.
  • Deliver architecture proposals to design teams and leadership.
  • Analyze benchmarks and workloads for architecture optimization.
  • Map AI use cases to NPU and optimize HW/SW co-design.
  • Collaborate across SOC, Driver, OS, and System teams with documentation.

Skills

NPU architecture
Cycle-accurate modeling
Python
C++
System C
CNN/LLM models
ML frameworks
SoC micro-architecture
Hardware-Software co-design
Team collaboration

Education

Bachelor’s/Master’s/PhD in Electrical or Computer Science

Tools

TensorFlow
PyTorch
ONNX
Python
C++
System C

Job description

Samsung Research America seeks an accomplished NPU Architect to lead architectural and micro-architectural work for next‑gen SoCs. You will drive exploration, performance modeling, and HW/SW co-design while shaping power and area efficiency for Galaxy devices.

The role requires deep expertise in CNN/LLM models, Python/C++, and ML frameworks, with leadership across hardware and software teams in a high‑visibility setting.

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