Lead Architect - CPU Architecture & Performance

Samsungsemiconductor; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Benefits offered by this job

Charitable giving match

Paid time off 4+ weeks

Fertility/adoption support

Onsite cafe & gym

Job summary

Samsung Semiconductor in San Jose is seeking a Principal Engineer for Architecture & Performance Research focused on Data Center and agentic AI CPU design. You will lead microarchitectural exploration, run performance analyses, and drive RTL-to-silicon validation using AI-driven methods.

You will mentor engineers, shape long-term design direction, and collaborate across teams. A Master’s or PhD with extensive CPU experience is required, with on-site work in San Jose and a competitive base pay

Qualifications

• Master’s or PhD with extensive CPU/architecture experience.
• Experience designing/high-performance CPU architectures (RISC-V/ARM/x86).
• Strong quantitative performance analysis and modeling skills.
• Experience from research to RTL/silicon validation.

Responsibilities

• Define the microarchitectural direction for next-generation CPU cores, including agentic AI and memory-centric architectures.
• Lead end-to-end performance analysis using architectural simulators and RTL.
• Translate workload insights into architectural requirements and long-term design direction.
• Drive architecture-to-implementation alignment with design teams from RTL to silicon.
• Mentor Senior and Staff engineers across multiple projects and domains.
• Lead research contributions leading to patents/publications.

Skills

CPU microarchitecture

architecture research

performance engineering

gem5

C/C++

Python

performance modeling

mentoring

patents/publications

Education

Master’s degree in Computer Engineering/CS

PhD

Tools

RTL tooling

Simulation tools

Python scripting

Job description

Samsung Semiconductor in San Jose is seeking a Principal Engineer for Architecture & Performance Research focused on Data Center and agentic AI CPU design. You will lead microarchitectural exploration, run performance analyses, and drive RTL-to-silicon validation using AI-driven methods.

You will mentor engineers, shape long-term design direction, and collaborate across teams. A Master’s or PhD with extensive CPU experience is required, with on-site work in San Jose and a competitive base pay