Principal CPU Architect & Performance Leader

Samsung Semiconductor; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Job summary

Samsung Semiconductor seeks a Principal Engineer to define the architectural vision and performance direction for next‑gen CPU platforms in data center workloads and agentic AI. You’ll work with RTL teams to translate architecture into silicon and lead multiple domains across generations.

Responsibilities include end‑to‑end performance analyses, defining specialization directions, and driving architectural decisions while mentoring engineers and pursuing patents/publications.

Qualifications

• Master’s degree in Computer Engineering, Computer Science, or a related field with 18+ years of experience, or PhD with 15+ years.
• 8+ years of experience in CPU microarchitecture, architecture research, or performance engineering.
• Experience designing/evaluating high‑performance CPU architectures (RISC‑V/ARM/x86).
• Proven ability to use quantitative performance analysis and modeling to influence decisions.
• Hands-on with architectural simulators and performance models, such as gem5.

Responsibilities

• Define the application‑specialization direction for next‑generation CPU cores and lead the microarchitectural vision.
• Lead end‑to‑end performance analysis using architectural simulators and RTL, guiding trade‑offs.
• Translate workload characterization into architectural requirements and long‑term design direction.
• Drive alignment from architecture to RTL and silicon with design teams.
• Mentor Senior and Staff engineers and provide technical leadership across projects.
• Drive research contributions leading to patents and publications.

Skills

CPU microarchitecture

Performance engineering

RISC-V/ARM/x86

Quantitative analysis

C/C++

Python

RTL/silicon validation

Gem5 tooling

Education

Master’s degree in Computer Engineering/CS

PhD in a related field

Tools

gem5

RTL tooling

Job description

Samsung Semiconductor seeks a Principal Engineer to define the architectural vision and performance direction for next‑gen CPU platforms in data center workloads and agentic AI. You’ll work with RTL teams to translate architecture into silicon and lead multiple domains across generations.

Responsibilities include end‑to‑end performance analyses, defining specialization directions, and driving architectural decisions while mentoring engineers and pursuing patents/publications.