Senior Hardware Engineer – ML Acceleration Chips

Amazon; Cupertino (CA); On-site; USD 157,000 - 213,000; Full time

Job summary

Annapurna Labs, the AWS hardware division, is seeking a Hardware Design Engineer to define, design and validate next-generation ML chips, cards, and server integrations. You will contribute to PCIe/Serdes topics and drive hardware optimization for large-scale AWS data centers.

You will work with a high-caliber team on challenging verification tasks, exploring new technologies and methods to improve performance, quality, and cost.

Qualifications

• Bachelor's degree in Electrical Engineering or a related field.
• Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills.
• Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing.
• Master's degree in Electrical or Communications Engineering or a related field.
• Experience with formal verification techniques including abstraction and end-to-end checking.
• Experience with ARM and various DSP ISAs.
• Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards.
• Experience with industry standard tools and scripting languages (Python or Perl) for automation.

Responsibilities

• Design and validation of AWS next generation ML Chips, Cards and server integration.
• Lead in applying new technologies to large scale server deployments to deliver a world-class customer experience.
• Aim to improve product performance, quality and cost across the hardware stack.

Skills

Bug identification

System verification

Arm DSP ISAs

RF standards knowledge

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical or Communications Engineering

Tools

Python

Perl

Job description

Annapurna Labs, the AWS hardware division, is seeking a Hardware Design Engineer to define, design and validate next-generation ML chips, cards, and server integrations. You will contribute to PCIe/Serdes topics and drive hardware optimization for large-scale AWS data centers.

You will work with a high-caliber team on challenging verification tasks, exploring new technologies and methods to improve performance, quality, and cost.