RTL Design Engineer: Mixed-Signal & Verilog Expert

Apple Inc.; Melbourne (FL); On-site; USD 110,000 - 170,000; Full time

Job summary

Apple Inc. in Melbourne, FL is seeking an RTL Design Engineer to help specify, design and verify digital and mixed-signal circuits. You will code RTL in Verilog/SystemVerilog, participate in design verification, and assist lab bring-up with test scripts and data analysis.

The role requires a BS in Electrical Engineering and experience with front-end tools and scripting. Excellent communication skills and a drive to innovate are essential.

Qualifications

• Experience in RTL design and digital block development.
• Proficiency in Verilog and SystemVerilog.
• Familiarity with front-end tools and verification.
• Knowledge of mixed-signal concepts and analog modeling.
• Proficient in scripting languages (Python/Perl).
• Strong communication and presentation skills.

Responsibilities

• Specify and micro-architect digital blocks in mixed-signal circuits.
• RTL coding of blocks and verification activities.
• Contribute to lab bring-up, write tests, analyze data.
• Interact with verification teams and propose experiments.

Skills

RTL design

Verilog/SystemVerilog

front-end tools

scripting (Python/Perl)

GenAI in design

signal processing basics

Education

Bachelors of Science in Electrical Engineering

Tools

Verilog simulators

linters

CDC

RDC

LEQ

UPF

Synthesis

DFT

Job description

Apple Inc. in Melbourne, FL is seeking an RTL Design Engineer to help specify, design and verify digital and mixed-signal circuits. You will code RTL in Verilog/SystemVerilog, participate in design verification, and assist lab bring-up with test scripts and data analysis.

The role requires a BS in Electrical Engineering and experience with front-end tools and scripting. Excellent communication skills and a drive to innovate are essential.