Memory Interface Validation Lead (DDR4/5)

Rambus; San Jose (CA); On-site; USD 162,000 - 300,000; Full time

Benefits offered by this job

Base salary

Bonus

Equity

401(k) matching

Employee stock purchase plan

Medical and dental benefits

Time-off program

Gym membership

Job summary

Rambus seeks a Validation Manager for its Memory Interface Chip unit to lead validation and characterization of memory buffer chips, leveraging DDR4/DDR5 expertise and strong Python automation. You will guide cross-functional teams, drive validation methodologies, and ensure high-quality silicon products.

The role combines hands-on bench work with process leadership in a dynamic, innovation-focused environment.

Qualifications

• Bachelor's or master's degree in Electrical Engineering with 10+ years of experience including DDR4/DDR5 exposure.
• Experience simulating high-speed memory (DDR4, DDR5) and/or SERDES interfaces.
• Bench testing experience with knowledge on ATE or System Testing is a plus.
• Track record of growing organizations with focus on validation methodology development.
• Project planning, resource allocation, budgeting and test methodology development for silicon validation.
• Knowledge of processor/memory device architecture and specifications.
• Python programming expert focused on validation automation and data analysis.

Responsibilities

• Partner with internal and external cross-functional teams across all levels of a corporation.
• Own and continuously adapt validation methodologies to improve validation coverage and time-to-market.
• Collaborate with Design, Architecture, Verification, and Operations to deliver buffer chip products.
• Coordinate with external partners for test equipment, PCB manufacturing and assembly.
• Manage bench validation team to execute validation and characterization of memory buffer chips.
• Hands-on bench validation, characterization, and lab automation software development.

Skills

DDR4/DDR5

Python automation

Memory architecture

Bench testing

SERDES interfaces

Project planning

Budgeting

Education

B.S./M.S. EE

Tools

ATE testing

Job description

Rambus seeks a Validation Manager for its Memory Interface Chip unit to lead validation and characterization of memory buffer chips, leveraging DDR4/DDR5 expertise and strong Python automation. You will guide cross-functional teams, drive validation methodologies, and ensure high-quality silicon products.

The role combines hands-on bench work with process leadership in a dynamic, innovation-focused environment.