Principal PE Validation Engineer — Memory Interface

Rambus.com; San Jose (CA); Hybrid; USD 141,000 - 262,000; Full time

Benefits offered by this job

Base salary

Bonus

Equity

401(k) matching

Employee stock purchase plan

Medical and dental benefits

Time-off program

Gym membership

Job summary

Rambus seeks a Principal Validation Engineer for its Memory Interface Chip unit in California. The role focuses on lab bring-up, validating high-speed memory designs, and developing automated scripts for lab data analysis.

Strong memory system and high-speed signaling knowledge are required, with hands-on hardware experience including x86 systems. The position is full-time with hybrid work options, offering base salary, bonus, equity, and benefits.

Qualifications

• Knowledge of processor/memory system architecture.
• Understanding of high speed interface concepts, including signal integrity.
• Working knowledge of test and measurement equipment, troubleshooting and debugging.
• Experience on hardware equipment like multimeters, oscilloscopes, logic and protocol analyzers, protocol generators, etc.
• Knowledge on characterization, board design, debug and troubleshooting
• Hands-on hardware experience with x86 computer systems.

Responsibilities

• Lab bring-up and validation of high-speed memory buffer semiconductor products.
• Develop test methodologies for validating silicon designs against specifications.
• Develop scripts for automating lab equipment and for analyzing lab data.
• Experience in Bench testing, with knowledge or experience on ATE or/and System Testing is a plus
• Perform bench planning, preparation, and characterization execution.
• Work with silicon design teams to develop experiments, drive data collection, data analysis, and present results analysis and reports.
• Support Applications Team in understanding and resolving customer issues.

Skills

Processor-memory architecture

High-speed interfaces

Test & measurement equipment

Hardware lab experience

x86 systems

Debug & troubleshooting

Education

B.S. or M.S. in Electrical Engineering

Tools

Oscilloscopes

Multimeters

Logic analyzers

Protocol analyzers

Protocol generators

Job description

Rambus seeks a Principal Validation Engineer for its Memory Interface Chip unit in California. The role focuses on lab bring-up, validating high-speed memory designs, and developing automated scripts for lab data analysis.

Strong memory system and high-speed signaling knowledge are required, with hands-on hardware experience including x86 systems. The position is full-time with hybrid work options, offering base salary, bonus, equity, and benefits.