Senior IC Packaging Architect: SiP & Chiplet Systems

Axiado; San Jose (CA); On-site; USD 140,000 - 180,000; Full time

Job summary

Axiado in San Jose, California, is searching for a Senior IC Packaging Engineer to lead the architectural ownership of advanced IC and System-in-package (SiP) solutions. This role requires significant experience in IC packaging and strong technical leadership skills to drive multiple programs from concept through to production.

The selected candidate will define packaging architectures while working closely with foundries and cross-functional teams to influence product strategies and optimize packaging methodologies.

Qualifications

• 10+ years of experience in IC packaging for SoCs or ASICs.
• Hands-on experience with FlIP-Chip BGA and SiP architectures.
• Ability to operate autonomously in a startup environment.

Responsibilities

• Define and drive high-performance packaging architectures.
• Lead technical authority for IC and SiP packaging.
• Drive external engagement with OSATs and suppliers.

Skills

IC packaging expertise

Flip-Chip BGA design

High-speed SerDes package development

Cross-functional leadership

Electrical, mechanical, thermal reliability knowledge

Education

BSEE or MSEE in Electrical Engineering

Tools

Cadence Allegro Package Designer

HFSS

Ansys Designer

Job description

Axiado in San Jose, California, is searching for a Senior IC Packaging Engineer to lead the architectural ownership of advanced IC and System-in-package (SiP) solutions. This role requires significant experience in IC packaging and strong technical leadership skills to drive multiple programs from concept through to production.

The selected candidate will define packaging architectures while working closely with foundries and cross-functional teams to influence product strategies and optimize packaging methodologies.