Senior I/O SoC Architect — High-Speed Ethernet & USB

Ampere; Portland (OR); On-site; USD 225,500 - 338,500; Full time

Job summary

Ampere, a semiconductor design company, is seeking a Sr. Principal I/O SoC Architect to own the I/O subsystem for next-gen server-class SoCs.

You will define data movement, on-chip interconnects, and external interfaces, leading Ethernet/TSN and USB ecosystem integration, with cross-team collaboration and architecture documentation. We value 8+ years in SoC design, strong TSN and USB expertise, and the ability to mentor engineers while delivering silicon-ready IP and robust IP lifecycle

Qualifications

• BS degree in Electrical/Computer Engineering or CS with 12 years of related experience; or MS with 8 years; or PhD with 5 years.
• Experience delivering designs across Ethernet/USB and high-speed IO.
• Strong knowledge of on-chip interconnects (AXI/CHI), DMA, memory subsystems.

Responsibilities

• Architect overall I/O subsystem strategy for next-gen SoCs.
• Lead integration of multi-gigabit Ethernet IP with TSN.
• Own USB ecosystem designs across USB3.x/USB4.
• Evaluate third-party IP for high-speed protocols.
• Collaborate with SoC, verification, PD, and software teams.
• Author architecture specifications and docs.
• Mentor junior engineers on high-speed IO.

Skills

SoC architecture

I/O subsystems

Ethernet IP

TSN standards

USB 3.x/USB4

AXI/CHI

DMA engines

Memory interfaces

IP lifecycle

PCIe Gen4/5/6

Education

BS/CE/CS + 12y

Job description

Ampere, a semiconductor design company, is seeking a Sr. Principal I/O SoC Architect to own the I/O subsystem for next-gen server-class SoCs.

You will define data movement, on-chip interconnects, and external interfaces, leading Ethernet/TSN and USB ecosystem integration, with cross-team collaboration and architecture documentation. We value 8+ years in SoC design, strong TSN and USB expertise, and the ability to mentor engineers while delivering silicon-ready IP and robust IP lifecycle