Senior High-Speed PCB Layout Engineer

Arm Limited; Chandler (AZ); On-site; USD 198,000 - 268,000; Full time

Job summary

Arm Limited is seeking a Senior PCB Layout Engineer to join its Hardware Platforms team in Chandler, AZ. You will design complex PCBs, optimize layouts for high-speed signals, and collaborate with packaging teams to meet stringent performance and manufacturability requirements.

The role focuses on impedance-controlled multi-layer PCBs, high-pin-count devices, and expertise in Cadence OrCAD CIS and Allegro PCB tools. A strong SI/PI background is essential.

Qualifications

• Experience of designing complex, impedance controlled multi-layer PCBs (>20 layers).
• High-pin-count devices (>2000) and high-speed interfaces (PCIe, DDR).
• Collaboration with chip packaging teams on pinout and routing topologies.
• Understanding of SI/PI in routing strategies.

Responsibilities

• Collaborate with hardware design teams across multiple projects to develop complex and innovative designs, from mechanical and thermal requirements, footprint creation and component placement to optimising power planes and routing of high-speed parallel and serial signals.
• Finalise designs to deliver data packs (ODB++, Gerber, Fabrication and Assembly drawings and BOMs). You will utilise and develop your skills to design PCBs for sophisticated compute platforms to meet the requirements of the project team and customers whilst ensuring efficient performance and manufacturability.

Skills

Impedance controlled PCBs

HDI PCBs

High pin count

PCIe interfaces

DDR interfaces

Signal Integrity

Power Integrity

Fabrication knowledge

Tools

Cadence OrCAD CIS

Allegro PCB

Job description

Arm Limited is seeking a Senior PCB Layout Engineer to join its Hardware Platforms team in Chandler, AZ. You will design complex PCBs, optimize layouts for high-speed signals, and collaborate with packaging teams to meet stringent performance and manufacturability requirements.

The role focuses on impedance-controlled multi-layer PCBs, high-pin-count devices, and expertise in Cadence OrCAD CIS and Allegro PCB tools. A strong SI/PI background is essential.