High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5

Pentangle Tech Services | P5 Group; Santa Clara (CA); On-site; USD 120,000 - 170,000; Full time

Job summary

Pentangle Tech Services | P5 Group seeks hardware validation engineers with DDR5/PCIe Gen 5 experience for silicon bring-up and validation. Strong electrical background with Python scripting is a plus; candidate should understand SERDES, memory systems, and high-speed interfaces.

Responsibilities include debugging with design teams, validating IP on silicon and boards, performing tests, and contributing to test-plan improvements to ensure top-quality IP.

Qualifications

• Experience in post-silicon electrical validation of server processors or comparable hardware.
• Understanding of high-speed interfaces and signal integrity principles.
• Knowledge of DDR/PCIe architectures and memory systems.
• Experience with PCIe TX/RX validation and system margin analysis.
• Python scripting for test automation and data handling.

Responsibilities

• Work with design teams to debug issues and analyze performance.
• Validate silicon bring-up and post-silicon IP issues with customers.
• Execute tests to measure parameters and identify root causes.
• Improve test plans and environments to reduce silicon issues.
• Utilize lab equipment such as scopes and analyzers to characterize interfaces.

Skills

Post Silicon Electrical Validation

High speed interfaces

Signal integrity

Computer architecture

DRAM architecture knowledge

DDR5/PCIe Gen5 knowledge

Die Interconnect Buses / GPIO

Python for test automation

Data analysis (statistics)

Margin analysis

Tools

Oscilloscope

Logic analyzer

Spectrum analyzer

BERTs

Probes

Job description

Pentangle Tech Services | P5 Group seeks hardware validation engineers with DDR5/PCIe Gen 5 experience for silicon bring-up and validation. Strong electrical background with Python scripting is a plus; candidate should understand SERDES, memory systems, and high-speed interfaces.

Responsibilities include debugging with design teams, validating IP on silicon and boards, performing tests, and contributing to test-plan improvements to ensure top-quality IP.