Senior HBM Validation Engineer

Micron Technology; Folsom (CA); On-site; USD 145,000 - 247,000; Full time

Job summary

Micron Technology in California seeks a Principal Engineer to join the HBM Product Engineering Component Validation team. You will validate advanced High Bandwidth Memory products and drive zero-escape validation across test modes and milestones.

You will leverage Python, C/C++, Verilog, and UVM to improve coverage, analyze failures, and guide design feedback. Collaboration with Design Validation and Systems Engineering is essential, with opportunities to mentor across sites.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Computer Engineering or a related field, with a minimum of 6 years of relevant experience preferably in the memory semiconductor industry.
• Strong understanding of the structure, operation, and build concepts of DRAM and HBM memory technologies.
• Proven experience reading and debugging circuit schematics to isolate failure causes linked to develop aspects.
• Extensive experience in post-silicon product validation and debug, including root-cause and electrical failure analysis.
• Solid experience programming with Linux, Python/C/C++, Verilog, UVM, and version control systems (git, svn, Perforce).

Responsibilities

• Translate DRAM/HBM develop intent and architecture into effective verification scope and test cases.
• Contribute to validation of new and high-risk product features, working with Design Validation, and Systems Engineering.
• Review design specifications, schematics, and datasheets, provide design feedback and represent the Product Engineering perspective in Design and Verification reviews.
• Read, analyze, and debug circuit blueprints to detect design-related failure mechanisms, and recommend approaches for verification and fault diagnosis.
• Perform root-cause analysis and examination of electrical failures (debug) of validation findings, distinguishing developed marginality from process and test-related issues.
• Apply automation and modern tooling (including Python, C, and C++ coding, Verilog and UVM for simulation) to improve detection efficiency and cycle time.
• Adopt agentic and LLM-based workflows — such as automated code generation and review, and failure-analysis / root-cause acceleration, to improve efficiency, quality, and turnaround duration.

Skills

Python

C/C++

Verilog

UVM

Linux

Version control

Education

Electrical/Computer Engineering degree

Tools

Git

SVN

Perforce

Job description

Micron Technology in California seeks a Principal Engineer to join the HBM Product Engineering Component Validation team. You will validate advanced High Bandwidth Memory products and drive zero-escape validation across test modes and milestones.

You will leverage Python, C/C++, Verilog, and UVM to improve coverage, analyze failures, and guide design feedback. Collaboration with Design Validation and Systems Engineering is essential, with opportunities to mentor across sites.