Senior HBM SoC RTL Design Engineer – High-Impact & Equity

Micron; Folsom (CA); On-site; USD 181,000 - 323,000; Full time

Job summary

Micron Technology is seeking a SoC Design Engineer to join the Heterogeneous Integration Group (HIG) in the United States. You will help design, develop, and integrate next‑generation HBM SoC logic die, collaborating with architecture, verification, physical design, firmware, and product teams to deliver high‑performance RTL solutions.

This hands‑on role emphasizes RTL build, IP integration, debugging, and pre/post‑silicon support, including clocking, power intent, and design reviews across

Qualifications

• Bachelor’s or Master’s degree in electrical engineering, computer engineering, or related field.
• 10+ years of experience in a related field.
• Proficiency in SystemVerilog/Verilog.
• Familiarity with RTL-to-GDS flow (synthesis, STA, sign-off).
• Experience with EDA tools from Cadence, Synopsys, and/or Siemens.
• Programming or scripting experience (Python, TCL, Perl, or shell).

Responsibilities

• Design and implement RTL for SoC-level blocks and subsystems used in HBM logic die.
• Integrate internal and third-party IP (controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
• Collaborate with SoC architects to translate specs into RTL implementations.
• Participate in SoC-level integration activities (clocking, reset, power intent, configuration).
• Assist with pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.
• Contribute to design docs, block specs, and design reviews.
• Collaborate across Product Engineering, Test, Process Integration, and Manufacturing for robust builds.

Skills

SystemVerilog/Verilog

RTL design

Scripting (Python/TCL/Perl)

Education

Bachelor’s or Master’s in EE/CE

Tools

Cadence/Synopsys/Siemens tools

Job description

Micron Technology is seeking a SoC Design Engineer to join the Heterogeneous Integration Group (HIG) in the United States. You will help design, develop, and integrate next‑generation HBM SoC logic die, collaborating with architecture, verification, physical design, firmware, and product teams to deliver high‑performance RTL solutions.

This hands‑on role emphasizes RTL build, IP integration, debugging, and pre/post‑silicon support, including clocking, power intent, and design reviews across