Senior HBM Design Architect - DFT & Test Strategy

Micron Technology, Inc; Boise (ID); On-site; USD 146,000 - 297,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Robust paid time-off program

Paid family leave

Job summary

Micron Technology, Inc is seeking a Staff HBM Design Architect in Boise, Idaho. The role includes defining end-to-end DFT architectures for HBM products, collaborating closely with design and manufacturing teams. Candidates should have a Bachelor's or Master's degree in Electrical Engineering or Computer Engineering, and over 5 years of experience in DRAM or ASIC DFT design. Competitive salary range is between $146,000 and $297,000 annually, plus benefits and bonuses.

Qualifications

• 5+ years of experience in DRAM or ASIC DFT design or verification.
• Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts.

Responsibilities

• Define and implement end-to-end DFT architectures for HBM base die and DRAM die.
• Collaborate across design, verification, layout, test, and manufacturing teams.

Skills

DFT architectures

Scan, MBIST, JTAG

Wafer probe and final test flows

DRAM or ASIC DFT design

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field

Job description

Micron Technology, Inc is seeking a Staff HBM Design Architect in Boise, Idaho. The role includes defining end-to-end DFT architectures for HBM products, collaborating closely with design and manufacturing teams. Candidates should have a Bachelor's or Master's degree in Electrical Engineering or Computer Engineering, and over 5 years of experience in DRAM or ASIC DFT design. Competitive salary range is between $146,000 and $297,000 annually, plus benefits and bonuses.