Staff HBM Design Architect - DFT

Micron Technology, Inc; Richardson (TX); On-site; USD 146,000 - 297,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Job summary

Micron Technology, Inc in Richardson, Texas is seeking an HBM Design Architect to define and implement end-to-end DFT architectures for HBM products. The ideal candidate will have a strong background in DRAM or ASIC design with over 5 years of experience in testing methodologies.

Responsibilities include collaborating across multiple teams to ensure the quality and performance of complex multi-die architectures. The position offers a competitive salary and comprehensive benefits package.

Qualifications

• 5+ years of experience in DRAM or ASIC DFT design or verification.
• Strong knowledge of test access mechanisms and yield learning.

Responsibilities

• Define and implement end-to-end DFT architectures for HBM.
• Develop DFT strategies for test flows.
• Architect test access mechanisms supporting wafer probe.

Skills

Knowledge of scan, MBIST, JTAG

Experience with wafer probe and final test

Experience in DRAM or ASIC DFT design

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Job description

Micron Technology is a world leader in innovating memory and storage solutions. In the HBM design organization, we build test architectures that enable the most advanced memory products, making 3D‑stacked memory reliable at scale. As an HBM Design Architect, you will define how next‑generation HBM products are tested from wafer to system, ensuring quality, yield, and performance across complex multi‑die architectures.

Responsibilities

• Define and implement end‑to‑end DFT architectures for HBM base die and DRAM die
• Develop DFT strategies for stacked‑die, cube‑level, and system‑level test flows
• Architect test access mechanisms supporting wafer probe through final test
• Enable silicon observability for yield learning, debug, and failure analysis
• Collaborate across design, verification, layout, test, and manufacturing teams

Minimum Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
• Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts
• Experience with wafer probe and final test semiconductor flows
• 5+ years of experience in DRAM or ASIC DFT design or verification

Preferred Qualifications

• Experience with HBM, DRAM, or advanced memory products
• Knowledge of TSV‑based 3D integration and stacked‑die test challenges
• Hands‑on experience with at‑speed test or advanced DFT techniques
• Exposure to DFT security features or custom customer test interfaces

Compensation

The US base salary range for this full‑time position is $146,000.00 – $297,000.00 per year. Additional compensation may include benefits, bonuses, and equity.

Benefits

Micron offers a range of medical, dental, and vision plans; income protection and paid family leave; a robust paid time‑off program; and paid holidays. Detailed benefit information can be found in the Micron Benefits Guide.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.