HBM Health Product Engineer (DFT) – AI-Driven Test Innovator

Micron Technology, Inc; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Job summary

Micron Technology, Inc in Boise, Idaho, is seeking a Media Health HBM Product Engineer (DFT) to develop, deploy, and optimize test strategies for Micron's DRAM in HBM products. You will guide probe wafer level testing, burn-in, and ATE test code, collaborating with Design, Test, and MH teams to validate device performance.

Responsibilities include pre-silicon simulations of DFT circuits, defining tester resources, debugging test programs, data analysis, and leveraging AI tools to improve yield.

Qualifications

• Bachelor's degree in Computer or Electrical Engineering, Master's preferred.
• Experience in DRAM or memory testing is expected.

Responsibilities

• Work with Design Engineering to run simulations pre-silicon to validate DFT circuits and test modes, and communicate design issues found.
• Work on pre-silicon tasks with MH and test teams to define required tester resources.
• Collaborate with Test Engineering and HBM Product Engineering to ensure product requirements are understood, including test program debug, data examination, and test development.
• Support fabrication sites and Process Integration through test development to improve feedback.
• Debug and identify root causes for failures using data, electrical and physical analysis.
• Use AI with existing tools to improve test flows, strategies, and yield.
• Supervise yields to ensure projections are met and investigate root causes when not.
• Provide technical training and On-The-Job guidance for new engineers and data interpretation.

Skills

C

C++

Python

Education

Bachelor's in Computer Engineering or Electrical Engineering

Master's degree preferred

Tools

Linux

Linux CLI

Claude Code

Job description

Micron Technology, Inc in Boise, Idaho, is seeking a Media Health HBM Product Engineer (DFT) to develop, deploy, and optimize test strategies for Micron's DRAM in HBM products. You will guide probe wafer level testing, burn-in, and ATE test code, collaborating with Design, Test, and MH teams to validate device performance.

Responsibilities include pre-silicon simulations of DFT circuits, defining tester resources, debugging test programs, data analysis, and leveraging AI tools to improve yield.