Senior Full-Chip PD Engineer: Clocking & PV

Doist; San Jose (CA); On-site; USD 180,000 - 280,000; Full time

Benefits offered by this job

Medical, dental, and vision packages

Housing subsidy for San Jose living

Relocation support

Daily meals in office

Unlimited compute budget

Job summary

Etched is building a new category of AI hardware focused on frontier inference clusters. As a top-level Physical Design engineer, you will own full-chip implementation—from floorplanning to GDSII, managing timing closure and PV sign-off, and collaborating with RTL designers to accelerate tapeouts.

You will drive clocking across PVT corners, develop robust ECO workflows, and lead signoff in a fast-paced startup environment in San Jose.

Qualifications

• 10+ years of chip planning and full-chip PD experience.
• Experience with top-level and full-chip closure on advanced process nodes (5nm and below).
• Proficiency with CAD/EDA tool flows and tapeout signoff (Cadence/Synopsys).
• Strong problem-solving ability and thinking from first principles.

Responsibilities

• Own full-chip clocking across all PVT corners and modes.
• Manage MMMC timing closure at the top level.
• Own timing constraints and hierarchical timing budgeting between top level and blocks.
• Drive ECO closure and achieve final timing signoff for tapeout.
• Own end-to-end PV closure at block, sub-system, and full-chip level.

Skills

Chip planning

Top-level PD

Floorplanning

Timing closure

Hierarchical timing budgeting

ECO closure

First principles thinking

Tools

Cadence Innovus

Cadence Genus

Synopsys Fusion Compiler

Synopsys PrimeTime

Cadence Tempus

Pegasus

Calibre

Python scripting

Job description

Etched is building a new category of AI hardware focused on frontier inference clusters. As a top-level Physical Design engineer, you will own full-chip implementation—from floorplanning to GDSII, managing timing closure and PV sign-off, and collaborating with RTL designers to accelerate tapeouts.

You will drive clocking across PVT corners, develop robust ECO workflows, and lead signoff in a fast-paced startup environment in San Jose.