Physical Design Engineer

The Consensus; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Medical coverage

Housing subsidy

Relocation support

Daily meals at office

Compute budget

Job summary

Etched is looking for exceptional Physical Design engineers to join our team in San Jose. In this role you will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.

You will collaborate with RTL designers, push automation, and develop dashboards that monitor project convergence. We seek deeply creative engineers comfortable working in a fast-paced startup environment.

Qualifications

• 5-10+ years of prior PD experience.
• Experience with RTL-to-GDSII flows and back-end timing closure.
• Knowledge of 5nm and below process nodes.
• Experience with Cadence and Synopsys PD tools.
• Familiarity with sign-off tools (PrimeTime, Tempus, Voltus).
• Experience with UPF-based low power design methodology.

Responsibilities

• Run PD flows to close blocks and support ASIC infrastructure.
• Collaborate with RTL Designers and provide PD feedback to improve PPA.
• Drive dashboards that show project convergence for PD.
• Optimize tool flows and collaborate with EDA vendors.
• Supervise outsourcing of physical design to a third party.

Skills

PD experience

Python scripting

First-principles thinking

Tools

Cadence Innovus

Cadence Genus

Synopsys ICC2

Fusion Compiler

PrimeTime

Tempus

Voltus

Job description

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

Etched is looking for exceptional Physical Design engineers to join our team. In this role, you
will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.

Key Responsibilities

• Deeply understand what is involved in physical design
• Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,
  improve CAD infrastructure
• Collaborate with RTL Designers and provide Physical Design feedback to improve PPA
• Drive dashboards that show the convergence of projects related to PD
• Optimize tool flows, working with EDA vendors to incorporate the latest features
• Accountable for block level closure
• Supervise the outsourcing of physical design to a 3rd party service

You may be a good fit if you have

• 5-10+ years of previous experience with PD
• Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
• Experience with back-end design and timing closure on advanced process nodes (5nm
  and below)
• Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)
  automated RTL-to-GDSII flows
• Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
• Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,
  routing, IR drop, and EM/antenna analysis
• Deeply creative and able to think from first principles

Strong candidates may also have experience with

• Familiarity with modern ML and LLM model architectures
• Ability to program with Python or another scripting language
• Familiarity with AI tools for programming/coding
• Startup experience or comfort working in fast-paced environments

Benefits

• Medical, dental, and vision packages with generous premium coverage
  • $500 per month credit for waiving medical benefits
• Housing subsidy of $2k per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch + dinner in our office
• Unlimited compute budget subject to ROI justification

How we’re different:

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.