Lead Space ASIC/FPGA Verification Engineer

Lockheed Martin; Highlands Ranch (CO); On-site; USD 110,000 - 205,000; Full time

Benefits offered by this job

Medical, Dental, Vision

Flexible work arrangements

401(k) match

Paid time off

Holidays

Parental Leave

EAP

Flexible Spending Accounts

Education Assistance

Life Insurance

Short-Term Disability

Long-Term Disability

Job summary

Lockheed Martin in Highlands Ranch, CO is seeking an ASIC/FPGA Verification/Emulation Engineer to support over 50 programs across military and space initiatives. This role involves verification, design analyses, and hands-on testing in a fast-paced, mission-focused environment.

The ideal candidate has a BS or higher in engineering, hands-on HDL/UVM experience, and strong leadership or collaboration skills. On-site, 9x80 schedule; security clearances may apply.

Qualifications

• Bachelor of Science or higher in Computer Engineering or Electrical Engineering or related discipline.
• Experience in verification of Digital ASICs/FPGAs and Mixed-signal ASICs/FPGAs.
• HDL programming with VHDL, Verilog, and SystemVerilog; UVM verification.
• Prior technical leadership experience preferred.

Responsibilities

• Develops, designs, verifies, and documents ASIC and FPGA development.
• Determines architecture design, logic design, and system simulation.
• Analyzes from high-level design to synthesis, place and route, timing and power utilization.
• Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results.

Skills

HDL programming (VHDL/Verilog/SV)

UVM verification methodology

Technical leadership

ASIC/FPGA project leadership

Space systems understanding

Customer-facing communication

Secret clearance

Education

Bachelor of Science in Computer/Electrical Engineering or related field

Job description

Lockheed Martin in Highlands Ranch, CO is seeking an ASIC/FPGA Verification/Emulation Engineer to support over 50 programs across military and space initiatives. This role involves verification, design analyses, and hands-on testing in a fast-paced, mission-focused environment.

The ideal candidate has a BS or higher in engineering, hands-on HDL/UVM experience, and strong leadership or collaboration skills. On-site, 9x80 schedule; security clearances may apply.