Flight-Critical FPGA Verification Engineer | UVM & DO-254

Anduril Industries; Costa Mesa (CA); On-site; USD 146,000 - 194,000; Full time

Benefits offered by this job

Equity grants

Health benefits

Top-tier benefits

Job summary

Anduril Industries is seeking an FPGA Verification Engineer in Costa Mesa, CA to own verification of FPGA/SoC designs on AMD (Xilinx) platforms with UVM-based methods. You will develop verification environments, plans, and assertions, and drive coverage to closure for flight-critical avionics.

The role requires SystemVerilog, UVM, SVA, and experience with industry simulators, in a team-focused, fast-paced setting. Security clearance eligibility is required.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• 2+ years of experience in FPGA/ASIC verification.
• Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches.
• Object-oriented programming principles.
• Industry simulators (Questa, VCS, Xcelium, or Vivado).
• Git-based collaborative workflows including code review.
• Linux development environments.
• Strong communication and teamwork skills.
• Eligible to obtain and hold a U.S. Secret security clearance.

Responsibilities

• Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs.
• Develop verification plans with traceability to system and hardware requirements.
• Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks.
• Build functional coverage models and drive code coverage analysis to closure.
• Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs.
• Establish and maintain regression suites, tracking coverage metrics and verification progress.
• Debug failures using waveform tools and simulation logs at the HDL and system level.
• Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement.
• Support hardware validation and board bring‑up on target platforms.
• Ensure verification meets DO-254 and relevant safety standards.
• Author verification closure reports and coverage analysis summaries.

Skills

SystemVerilog

UVM

Object-oriented programming

Linux development

Git workflows

Team communication

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field

Master’s degree in Electrical Engineering, Computer Engineering, or related field

Tools

Questa

VCS

Xcelium

Vivado

Job description

Anduril Industries is seeking an FPGA Verification Engineer in Costa Mesa, CA to own verification of FPGA/SoC designs on AMD (Xilinx) platforms with UVM-based methods. You will develop verification environments, plans, and assertions, and drive coverage to closure for flight-critical avionics.

The role requires SystemVerilog, UVM, SVA, and experience with industry simulators, in a team-focused, fast-paced setting. Security clearance eligibility is required.