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Job summary
A technology solutions provider is looking for a Technical Lead II - VLSI in Santa Clara, CA. The position requires extensive experience in FPGA design and verification, particularly with System Verilog and UVM methodologies. Candidates must have a Bachelor's or Master's degree in Electrical Engineering and over 10 years of relevant experience. This contract role focuses on verification of FPGA designs, working closely with design teams to ensure functionality and performance.
Qualifications
10+ years of experience in FPGA design or verification.
Familiarity with hardware description languages (e.g., VHDL, Verilog).
Responsibilities
Create and maintain test benches using industry-standard methodologies.
Write and debug test cases for various performance aspects.
Identify and debug issues in verification process.
Participate in design reviews.
Stay updated with verification methodologies.
Skills
Understanding of FPGA design
Proficiency in System Verilog
Experience with Linux
Verification tools experience
High-speed I/O knowledge
Debugging skills
Communication skills
Education
Bachelor's or Master's degree in Electrical Engineering
Tools
QuestaSim
Synopsys VCS
Job description
A technology solutions provider is looking for a Technical Lead II - VLSI in Santa Clara, CA. The position requires extensive experience in FPGA design and verification, particularly with System Verilog and UVM methodologies. Candidates must have a Bachelor's or Master's degree in Electrical Engineering and over 10 years of relevant experience. This contract role focuses on verification of FPGA designs, working closely with design teams to ensure functionality and performance.