FPGA Engineer

GCS Recruitment; Redmond (WA); On-site; USD 150,000 - 230,000; Full time

Job summary

GCS Recruitment is seeking a Senior FPGA Engineer to lead RTL design for advanced satellite payload hardware. You will build FPGA logic in Verilog/SystemVerilog or VHDL and integrate high‑speed interfaces such as PCIe, JESD204, Aurora and Ethernet. You will own timing closure and perform hardware bring‑up in a lab environment.

The role requires hands‑on debugging, board bring‑up, and close collaboration with electrical, hardware, and systems teams to deliver validated FPGA solutions.

Qualifications

• 8+ years FPGA/RTL design experience.
• Strong proficiency in Verilog, SystemVerilog or VHDL.
• Hands-on with high-speed transceivers and serial protocols.
• Experience achieving timing closure on complex FPGA designs.
• Lab bring-up, hardware debugging, and hardware validation.

Responsibilities

• Design, develop, and implement FPGA RTL in Verilog/SystemVerilog or VHDL.
• Develop high-speed interfaces (PCIe, JESD204, Aurora, Ethernet).
• Own timing constraints, clocking, and FPGA performance tuning.
• Bring-up and debug FPGA on new hardware platforms with test equipment.
• Collaborate with board design, hardware validation, and systems teams.
• Troubleshoot FPGA/hardware integration issues through validation.

Skills

FPGA/RTL design

Verilog

SystemVerilog

VHDL

Timing closure

Education

Bachelor's or Master's in Electrical or Computer Engineering

Tools

JTAG

ILA

ChipScope

Lab validation

Job description

We are seeking a highly experienced Senior FPGA Engineer to support the development of advanced satellite communications payload hardware.

This role focuses on developing FPGA logic for advanced phased-array payload systems. The ideal candidate will have strong expertise in RTL design, high-speed interfaces, timing closure, and hands‑on hardware bring‑up and debugging.

This is a highly hands‑on engineering position requiring experience taking FPGA designs from RTL development through hardware validation. The engineer will work closely with electrical, hardware, board design, and systems engineering teams in a laboratory environment.

What You'll Do

• Design, develop, and implement FPGA RTL using Verilog, SystemVerilog, or VHDL.
• Develop and integrate high-speed interfaces and protocols, including JESD204, Aurora, PCIe, and Ethernet.
• Own timing closure, timing constraints, clocking architecture, and FPGA performance optimization.
• Perform FPGA bring‑up and debug on new hardware platforms using JTAG, ILA, ChipScope, SignalTap, and laboratory equipment.
• Develop FPGA logic for high-speed data movement, control, and communication between custom silicon devices.
• Prototype and validate new functionality ahead of next‑generation ASIC development.
• Collaborate with board design, hardware validation, and systems engineering teams.
• Troubleshoot complex FPGA and hardware integration issues and drive designs through successful validation.

What We're Looking For

• 8+ years of FPGA/RTL design and development experience.
• Strong proficiency in Verilog, SystemVerilog, or VHDL.
• Hands‑on experience with high‑speed FPGA transceivers and serial communication protocols.
• Proven experience achieving timing closure on complex FPGA designs.
• Strong board bring‑up, hardware debugging, and lab validation experience.
• Experience working with AMD/Xilinx or Intel/Altera FPGA platforms.
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

Nice to Have

• Experience with JESD204, DSP, FFT, beamforming, SDR, radar, or wireless communication systems.
• Aerospace, satellite communications, or space‑based hardware experience.
• Experience with Zynq, Versal, UVM, Tcl, or Python.
• Knowledge of radiation‑tolerant FPGA design techniques, including Triple Modular Redundancy (TMR) and configuration scrubbing.

Why This Role?

This is an opportunity to contribute to cutting‑edge satellite communications technology and develop FPGA solutions for advanced space‑based hardware systems.

You will work alongside experienced hardware and systems engineering teams, solve challenging engineering problems, and take ownership of FPGA designs from initial RTL development through real‑world hardware validation and deployment.