Senior FPGA Engineer: AI Acceleration & HPC Architect

Everest Consultants, Inc.; Oregon; On-site; USD 180,000 - 240,000; Full time

Job summary

Everest Consultants, Inc. seeks a Senior FPGA Engineer to design, implement, and optimize FPGA-based solutions for cutting-edge AI computing architectures. You will handle RTL and HLS design, as well as system-level verification on high-performance FPGA platforms.

Responsibilities include developing FPGA modules, debugging complex hardware issues, and collaborating with architecture, software, and validation teams to meet performance, power, and reliability targets.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years FPGA/digital-design experience on production or advanced-development systems.
• Strong foundation in digital logic, timing, and hardware interfaces.
• Proficiency in RTL design for FPGA/ASIC, Verilog, and C/C++ HLS.
• Hands-on experience with PCIe FPGA platforms, DMA, AXI interfaces, interrupts, and host integration.
• Knowledge of HBM/DDR memory architecture, pipelining, and timing closure.
• Experience with FPGA verification: simulation, assertions, coverage, regression and ILA.
• Experience with AMD/Xilinx Vivado and Vitis HLS, plus Linux, Python, Tcl, Git, and C/C++ host software.
• Ability to collaborate in a multidisciplinary team and document designs clearly.
• Background in HPC/AI acceleration or heterogeneous architectures is a plus.

Responsibilities

• Develop and refine FPGA modules supporting AI architectures.
• Debug hardware issues and optimize designs for performance, power, and reliability.
• Collaborate with architecture, software, and validation teams.
• Contribute to design reviews and document test results.
• Help define best practices and methodologies for FPGA development.

Skills

FPGA/digital-design expertise

Cross-functional collaboration

Education

Bachelor's or Master's in EE/CE

Tools

Verilog HDL

C/C++ HLS

Vivado

Vitis HLS

Linux

Python

Tcl

Git

PCIe

Job description

Everest Consultants, Inc. seeks a Senior FPGA Engineer to design, implement, and optimize FPGA-based solutions for cutting-edge AI computing architectures. You will handle RTL and HLS design, as well as system-level verification on high-performance FPGA platforms.

Responsibilities include developing FPGA modules, debugging complex hardware issues, and collaborating with architecture, software, and validation teams to meet performance, power, and reliability targets.