Sr. FPGA Engineer

Everest Consultants, Inc.; Oregon; On-site; USD 180,000 - 240,000; Full time

Job summary

Everest Consultants, Inc. seeks a Senior FPGA Engineer to design, implement, and optimize FPGA-based solutions for cutting-edge AI computing architectures. You will handle RTL and HLS design, as well as system-level verification on high-performance FPGA platforms.

Responsibilities include developing FPGA modules, debugging complex hardware issues, and collaborating with architecture, software, and validation teams to meet performance, power, and reliability targets.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years FPGA/digital-design experience on production or advanced-development systems.
• Strong foundation in digital logic, timing, and hardware interfaces.
• Proficiency in RTL design for FPGA/ASIC, Verilog, and C/C++ HLS.
• Hands-on experience with PCIe FPGA platforms, DMA, AXI interfaces, interrupts, and host integration.
• Knowledge of HBM/DDR memory architecture, pipelining, and timing closure.
• Experience with FPGA verification: simulation, assertions, coverage, regression and ILA.
• Experience with AMD/Xilinx Vivado and Vitis HLS, plus Linux, Python, Tcl, Git, and C/C++ host software.
• Ability to collaborate in a multidisciplinary team and document designs clearly.
• Background in HPC/AI acceleration or heterogeneous architectures is a plus.

Responsibilities

• Develop and refine FPGA modules supporting AI architectures.
• Debug hardware issues and optimize designs for performance, power, and reliability.
• Collaborate with architecture, software, and validation teams.
• Contribute to design reviews and document test results.
• Help define best practices and methodologies for FPGA development.

Skills

FPGA/digital-design expertise

Cross-functional collaboration

Education

Bachelor's or Master's in EE/CE

Tools

Verilog HDL

C/C++ HLS

Vivado

Vitis HLS

Linux

Python

Tcl

Git

PCIe

Job description

Duration: FTE / Contract (3 – 6 months) / Part-Time

Our client is building groundbreaking heterogeneous architectures designed for the disaggregated computing needs of modern AI workloads. The company focuses on systems that can support 100x performance-to-bandwidth demands expected from future large-scale AI factories. By rethinking how compute, memory, and interconnects work together, our client enables highly efficient and scalable AI infrastructure.

Description

The Senior FPGA Engineer will design, implement, and optimize FPGA-based solutions that support client's advanced AI computing architectures. This position involves RTL and HLS design, and system-level verification on high-performance FPGA platforms.

Day-to-day responsibilities include developing and refining FPGA modules, debugging complex hardware issues, collaborating with cross-functional teams (architecture, software, and validation), and ensuring designs meet performance, power, and reliability targets. The engineer will also contribute to design reviews, maintain documentation, and help define best practices and methodologies for FPGA development within the organization.

Minimum Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
• 8+ years of FPGA or digital-design experience with complex production or advanced-development systems.
• Solid foundation in Electrical Engineering principles, particularly digital logic, timing, and hardware interfaces.
• Strong proficiency in RTL Design for FPGA/ASIC, hands-on practical experience with HDLs such as Verilog, and strong practical experience with C/C++ HLS.
• Hands-on experience with PCIe-connected FPGA platforms, DMA, AXI4/AXI4-Lite/AXI4-Stream, interrupts, and host integration.
• Strong knowledge of HBM/DDR and on-chip memory architecture, pipelining, buffering, backpressure, CDC, reset, and timing closure.
• Demonstrated capability in FPGA hardware verification and debug using simulation, assertions, coverage, reference models, automated regression, and ILA or equivalent tools.
• Experience with AMD/Xilinx Vivado and Vitis HLS, plus Linux, Python, Tcl, Git, and C/C++ host software.
• Familiarity with high-speed interfaces, memory subsystems, or networking protocols is beneficial.
• Ability to collaborate in a multidisciplinary team, communicate technical concepts clearly, and document designs and test results.
• Background in high-performance computing, AI and data analytics acceleration, or heterogeneous architectures is a plus.

Preferred Qualifications

• Datacenter or cloud or edge FPGA platforms
• AWS F1/F2, distributed data-processing frameworks