Sr. FPGA Engineer

JobDiva, Inc.; Beaverton (OR); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Equity

Medical insurance

401(k)

Job summary

Everest Consultants seeks a Senior FPGA Engineer to design, implement, and optimize FPGA-based solutions for AI computing architectures. The role covers RTL and high-level synthesis (HLS) design and system-level verification on high-performance FPGA platforms.

You will collaborate with architecture, software, and validation teams, participate in design reviews, document results, and help establish best practices for FPGA development.

Qualifications

• 8+ years FPGA or digital-design experience with complex production or advanced-development systems.
• Strong background in digital logic, timing, and hardware interfaces.
• Proficiency in RTL design for FPGA/ASIC; hands-on with Verilog and C/C++ HLS.
• Experience with PCIe-connected FPGA platforms, DMA, AXI4/AXI4-Lite/AXI4-Stream, interrupts, and host integration.
• Knowledge of memory architectures (HBM/DDR) and timing closure.
• Demonstrated FPGA hardware verification and debugging using simulation, assertions, coverage, and ILA.
• Experience with AMD/Xilinx Vivado and Vitis HLS, Linux, Python, Tcl, Git, and C/C++ host software.
• Excellent collaboration and documentation skills.

Responsibilities

• Design, implement, and optimize FPGA-based solutions for AI computing architectures.
• RTL and HLS design and system-level verification on high-performance FPGA platforms.
• Collaborate with architecture, software, and validation teams; participate in design reviews.
• Document designs and test results; contribute to best practices and methodologies.

Skills

RTL design

HDL Verilog

C/C++ HLS

PCIe FPGA platforms

HBM/DDR memory

ASE/AXI4 interfaces

FPGA verification

Xilinx Vivado/Vitis

Linux

Python/Tcl/Git

Education

Bachelor's or Master's in EE/CE

Tools

Vivado

Vitis HLS

Linux

Job description

Title: Sr. FPGA Engineer (Remote work)

Location: Remote

Duration: Full time/Contract

Salary is based on DOE

Description

The Senior FPGA Engineer will design, implement, and optimize FPGA-based solutions that support client's advanced AI computing architectures. This position involves RTL and HLS design, and system-level verification on high-performance FPGA platforms.

Day-to-day responsibilities include developing and refining FPGA modules, debugging complex hardware issues, collaborating with cross-functional teams (architecture, software, and validation), and ensuring designs meet performance, power, and reliability targets. The engineer will also contribute to design reviews, maintain documentation, and help define best practices and methodologies for FPGA development within the organization.

Minimum Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
• 8+ years of FPGA or digital-design experience with complex production or advanced-development systems.
• Solid foundation in Electrical Engineering principles, particularly digital logic, timing, and hardware interfaces.
• Strong proficiency in RTL Design for FPGA/ASIC, hands-on practical experience with HDLs such as Verilog, and strong practical experience with C/C++ HLS.
• Hands-on experience with PCIe-connected FPGA platforms, DMA, AXI4/AXI4-Lite/AXI4-Stream, interrupts, and host integration.
• Strong knowledge of HBM/DDR and on-chip memory architecture, pipelining, buffering, backpressure, CDC, reset, and timing closure.
• Demonstrated capability in FPGA hardware verification and debug using simulation, assertions, coverage, reference models, automated regression, and ILA or equivalent tools.
• Experience with AMD/Xilinx Vivado and Vitis HLS, plus Linux, Python, Tcl, Git, and C/C++ host software.
• Familiarity with high-speed interfaces, memory subsystems, or networking protocols is beneficial.
• Ability to collaborate in a multidisciplinary team, communicate technical concepts clearly, and document designs and test results.
• Background in high-performance computing, AI and data analytics acceleration, or heterogeneous architectures is a plus.

Preferred Qualifications

• Datacenter or cloud or edge FPGA platforms
• AWS F1/F2, distributed data-processing frameworks
• database or analytics acceleration
• RDMA/networking, multi-FPGA systems
• Early-stage product development.

Full time Benefits:

Base salary (DOE) plus equity, medical insurance, and 401(k).

For Contract:

The following benefits are offered for this position: medical, dental, & vision insurance, short-term disability, life and AD&D insurance, and a 401(k) retirement plan.

Everest Consultants is an equal opportunity employer and does not discriminate on the basis of race, color, religion, sex, national origin, age, disability, or any other characteristic protected by applicable local, state, or federal civil rights laws. #IND