Senior FPGA Design Engineer

Anysilicon; Needham, Northern (MA, KY); Hybrid; USD 130,000 - 180,000; Full time

Job summary

HPR, a leading provider of high-performance electronic trading infrastructure, is seeking a Senior FPGA Design Engineer to design, optimize, and maintain FPGA compute and networking systems used in electronic trading.

You will own the RTL design process from specification through synthesis and implementation, collaborate with verification teams, and mentor junior engineers while contributing to process improvements in a Linux-based environment.

Qualifications

• BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• 5+ years of experience in digital logic design for FPGAs or ASICs.
• SystemVerilog (preferred) or VHDL.
• Deep understanding of computer architecture and digital design concepts.
• Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi).
• Comfortable working in a Linux environment.
• Strong problem-solving, debugging, and communication skills.

Responsibilities

• Design, develop, optimize, and maintain high-performance FPGA compute and networking systems for electronic trading.
• Own the RTL design process from specification and coding through synthesis and FPGA implementation.
• Collaborate with design verification engineers to execute comprehensive test plans.
• Lead and mentor junior engineers, fostering a culture of continuous learning and collaboration.
• Contribute to the improvement of development processes, tools, and methodologies.

Skills

SystemVerilog

RTL design

FPGA/ASIC design

C/Python scripting

Networking knowledge

Education

BS in Computer/Electrical Eng or CS

MS in related field

Tools

VCS

Verdi

Linux

Job description

HPR is a leading provider of high-performance electronic trading and capital markets infrastructure solutions. We are seeking a Senior FPGA Design Engineer to innovate and enhance our technology used by tier-1 financial institutions.

Responsibilities:

• Design, develop, optimize, and maintain high-performance FPGA compute and networking systems for electronic trading.
• Own the RTL design process from specification and coding through synthesis and FPGA implementation.
• Collaborate with design verification engineers to execute comprehensive test plans.
• Lead and mentor junior engineers, fostering a culture of continuous learning and collaboration.
• Contribute to the improvement of development processes, tools, and methodologies.

Qualifications:

• BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• 5+ years of experience in digital logic design for FPGAs or ASICs.
• Proficiency in SystemVerilog (preferred) or VHDL.
• Deep understanding of computer architecture and digital design concepts.
• Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi).
• Comfortable working in a Linux environment.
• Strong problem-solving, debugging, and communication skills.

Skills:

• Experience with Xilinx and/or Altera FPGAs.
• Familiarity with FPGA architecture and advanced design techniques, including optimizations for synthesis and timing closure.
• In-depth knowledge of networking protocols (IP, TCP, UDP).
• Experience with high-speed interfaces (PCIe, Ethernet, and/or DDR).
• Familiarity with C programming and scripting in Python and/or Perl.