Senior FPGA Engineer

Calix; United States; Remote; USD 104,000 - 204,000; Full time

Job summary

Calix is seeking a Senior Hardware Engineer to join their remote team in the U.S. The role involves developing RTL code, working with ASIC vendors, and contributing to next-generation PON technology. Ideal candidates will have a strong background in hardware engineering, telecommunications, and relevant scripting languages.

Qualifications

• 2+ years of hardware engineering experience in telecommunications.
• Experience with ASIC vendors and defining architectures.
• Proficiency with RTL (Verilog / VHDL) and high-speed transceivers.

Responsibilities

• Work closely with product owners on technical direction.
• Develop RTL code for next-generation PON IP.
• Support technical leaders by contributing to patents.

Skills

Hardware engineering

Architecture

RTL (Verilog / VHDL)

High-speed transceivers

Statistical mathematics

Machine learning algorithms

Scripting languages (Python, Perl, TCL)

Education

BS degree in Computer Science, engineering, or mathematics

Job description

Calix provides the cloud, software platforms, systems and services required for communications service providers to simplify their businesses, excite their subscribers and grow their value.

Calix is leading a service provider transformation to deliver a differentiated subscriber experience around the Smart Home and Business, while monetizing their network using Role based Cloud Services, Telemetry, Analytics, Automation, and the deployment of Software Driven Adaptive networks. Calix's experience platform is built upon state-of-the-art optical networking architectures that continue to advance in support of this mission.

As part of a high performing global team, the right candidate will play a significant role as a Senior Hardware Engineer focused on future silicon technology and how this can be used to realize Calix next-generation PON intellectual property. FPGAs, ASICs, and hybrid SOCs will play an important role in the future of Calix products.

Responsibilities and Duties:

• Work closely with product owners to understand, analyze product requirements and provide feedback on technical direction and feasibility.
• Develop RTL code for Calix next-generation PON IP
• Develop conceptual, logical, and physical simulation models for Calix optical networks
• Support technical leaders by contributing to patents and papers
• Author trade studies by evaluating technology partners and their place within the Calix hardware ecosystem.

Qualifications:

• This role may be required to travel and attend face-to-face meetings and Calix sponsored events.
• 2+ years of hardware engineering and architecture with experience delivering mission critical products in the telecommunications space.
• Experience working with ASIC vendors defining architectures that reduce power, cost, and footprint.
• Developing proficiency with RTL (Verilog / VHDL)
• Experience with high-speed transceivers at 25G and above including PAM-4 modulation, transmission line theory, trans-impedance amplifiers,
• Basic understanding of fiber optic systems and modulation schemes
• Experience with statistical mathematics and machine learning algorithms.
• Comfortable with scripting languages such as Python, Perl, TCL, or equivalent.
• BS degree in Computer Science, engineering, or mathematics or equivalent experience.

Location:

• Remote-based position located in the United States.

#LI-Remote

Compensation will vary based on geographical location (see below) within the United States. Individual pay is determined by the candidate's location of residence and multiple factors, including job-related skills, experience, and education.

For more information on our benefits click here.

There are different ranges applied to specific locations. The average base pay range (or OTE range for sales) in the U.S. for the position is listed below.

San Francisco Bay Area Only:

119,600.00 - 203,600.00 USD Annual

All Other Locations:

104,000.00 - 177,000.00 USD Annual