Sr. FPGA Engineer

NGP Cap; California (MO); On-site; USD 110,000 - 150,000; Full time

Job summary

A leading technology company is seeking an FPGA Engineer to design the next generation of space-based navigation payloads. This role involves architecting high-performance digital systems that operate in extreme environments and requires strong expertise in FPGA development and signal processing. The ideal candidate will thrive in a collaborative environment and contribute to cutting-edge projects aimed at redefining satellite navigation.

Qualifications

• 3+ years of FPGA development experience using Verilog, VHDL, or SystemVerilog.
• Proven experience with AMD/Xilinx platforms.
• Background in DSP fundamentals and signal processing.

Responsibilities

• Architect and implement RTL for Xilinx RFSoC.
• Develop secure hardware blocks for authentication and anti-spoofing.
• Simulate, verify, and test designs rigorously.

Skills

FPGA development

Signal processing

Collaboration

Education

Bachelor’s or Master’s degree in Electrical or Computer Engineering

Tools

Vivado

Riviera Pro

Synplify

Job description

Description

Xona is building the next generation of satellite navigation — a high-performance, resilient alternative to GPS powered by a commercial constellation of low Earth orbit (LEO) satellites. We are on a mission to unlock a new era of autonomy, advanced mobility, and infrastructure resilience by delivering precise, secure, and robust positioning services to the world.

We’re not here to incrementally improve GNSS. We’re here to redefine it from the ground up.

We’re looking for a hands-on FPGA engineer to join our team and help design the next generation of space-based navigation payloads. You'll work on cutting-edge signal processing systems, secure hardware modules, and high-reliability designs that fly in orbit. If you thrive in a collaborative, fast-paced environment and are excited by the challenge of developing space-qualified digital systems, we want to hear from you.

What you'll do:

• Architect and implement RTL for Xilinx RFSoC and other space-qualified FPGAs.
• Design high-performance DSP and signal generation modules for navigation waveforms (e.g., PRN code generation, mixers, modulators).
• Develop secure hardware blocks (e.g., SHA-256, HMAC) for authentication and anti-spoofing.
• Build robust data pipelines to move and process signal streams in real-time.
• Design with space in mind: mitigate single event upsets (SEUs), implement fault detection/correction, and optimize for radiation-prone environments.
• Work closely with cross functional teams to bring up payload functionality on actual satellite hardware.
• Simulate, verify, and test your designs rigorously—then see them fly.

Requirements

• Bachelor’s or Master’s degree in Electrical or Computer Engineering (or similar).
• 3+ years of FPGA development experience using Verilog, VHDL, or SystemVerilog.
• Experience with HDL simulation and verification.
• Proven experience with AMD/Xilinx platforms—ideally RFSoC or Zynq Ultrascale+ - and their embedded PL+PS architectures.
• Solid background in DSP fundamentals and real-time signal processing in hardware.
• Strong grasp of on-chip dataflow, clock domain crossing, and AXI/AXI-Stream buses.
• Comfortable using Vivado, Riviera Pro, and Synplify.
• Proven track record of developing in a collaborative environment, including familiarity with git/gitlab and strong documentation discipline.
• Full-time, onsite in Burlingame, California (this role is not remote or hybrid)
• To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States (i.e. Green Card holder), or other protected individual as defined by 8 U.S.C. 1324b(a)(3)

Desired Qualifications

• Experience designing for space: SEU mitigation, TMR, scrubbing, or rad-hard flows.
• GNSS or navigation signal processing expertise (GPS, Galileo, etc.).
• Crypto hardware design (e.g., SHA-2, HMAC, AES) and experience with secure communication protocols.
• Familiarity with JESD204B/C, high-speed serial I/O, or RF front-end interfacing.
• Embedded software experience on ARM (e.g., for control/config of FPGA fabric).
• Python or TCL scripting for test automation and build flows.
• Knowledge of space qualification processes, radiation testing, or flight hardware integration, with preference for strong hardware-in-the-loop devops practices.
• C/C++ programming experience.
• Experience with digital generation of high performance RF signals.